r241438 broke IPMI access on Sun Fire X2200 M2(BCM5715).
Fix the IPMI regression by sending BGE_FW_DRV_STATE_UNLOAD to ASF/IPMI firmware in driver attach phase. Sending heartheat to ASF/IPMI is enabled only after upping interface so setting driver state to BGE_FW_DRV_STATE_START in attach phase broke IPMI access. While I'm here, add NVRAM arbitration lock before performing controller reset. ASF/IPMI firmware may be able to access the NVRAM while controller reset is in progress. Without the arbitration lock before resetting the controller, ASF/IPMI may not initialize properly. Special thanks to Miroslav Lachman who provided full remote debugging environments.
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25d74ee052
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@ -3594,15 +3594,15 @@ bge_attach(device_t dev)
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}
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bge_stop_fw(sc);
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bge_sig_pre_reset(sc, BGE_RESET_START);
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bge_sig_pre_reset(sc, BGE_RESET_SHUTDOWN);
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if (bge_reset(sc)) {
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device_printf(sc->bge_dev, "chip reset failed\n");
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error = ENXIO;
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goto fail;
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}
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bge_sig_legacy(sc, BGE_RESET_START);
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bge_sig_post_reset(sc, BGE_RESET_START);
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bge_sig_legacy(sc, BGE_RESET_SHUTDOWN);
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bge_sig_post_reset(sc, BGE_RESET_SHUTDOWN);
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if (bge_chipinit(sc)) {
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device_printf(sc->bge_dev, "chip initialization failed\n");
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@ -3960,6 +3960,20 @@ bge_reset(struct bge_softc *sc)
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} else
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write_op = bge_writereg_ind;
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if (sc->bge_asicrev != BGE_ASICREV_BCM5700 &&
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sc->bge_asicrev != BGE_ASICREV_BCM5701) {
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CSR_WRITE_4(sc, BGE_NVRAM_SWARB, BGE_NVRAMSWARB_SET1);
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for (i = 0; i < 8000; i++) {
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if (CSR_READ_4(sc, BGE_NVRAM_SWARB) &
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BGE_NVRAMSWARB_GNT1)
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break;
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DELAY(20);
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}
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if (i == 8000) {
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if (bootverbose)
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device_printf(dev, "NVRAM lock timedout!\n");
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}
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}
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/* Take APE lock when performing reset. */
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bge_ape_lock(sc, BGE_APE_LOCK_GRC);
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