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Partially revert r365069.

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This whitespace was intentionally added to help differentiate the different
register groups within this file.

While here add missing whitespace from earlier in the file,

Sponsored by:	Innovate UK
This commit is contained in:
andrew 2020-09-02 09:04:08 +00:00
parent c9bdaf9d57
commit 3e310e90ef
1 changed files with 14 additions and 0 deletions
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14
sys/arm64/arm64/identcpu.c
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@ -82,6 +82,7 @@ sysctl_hw_machine(SYSCTL_HANDLER_ARGS)
static const char machine32[] = "arm";
#endif
int error;
#ifdef SCTL_MASK32
if ((req->flags & SCTL_MASK32) != 0 && adaptive_machine_arch)
error = SYSCTL_OUT(req, machine32, sizeof(machine32));
@ -188,6 +189,7 @@ static const struct cpu_parts cpu_parts_arm[] = {
{ CPU_PART_NEOVERSE_N1, "Neoverse-N1" },
CPU_PART_NONE,
};
/* Cavium */
static const struct cpu_parts cpu_parts_cavium[] = {
{ CPU_PART_THUNDERX, "ThunderX" },
@ -263,6 +265,7 @@ struct mrs_field_value {
MRS_FIELD_VALUE(13ul<< _reg ## _ ## _field ## _SHIFT, "14 "_desc "s"), \
MRS_FIELD_VALUE(14ul<< _reg ## _ ## _field ## _SHIFT, "15 "_desc "s"), \
MRS_FIELD_VALUE(15ul<< _reg ## _ ## _field ## _SHIFT, "16 "_desc "s")
#define MRS_FIELD_VALUE_END { .desc = NULL }
struct mrs_field {
@ -283,6 +286,7 @@ struct mrs_field {
.mask = _register ## _ ## _name ## _MASK, \
.values = (_values), \
}
#define MRS_FIELD_END { .type = MRS_INVALID, }
/* ID_AA64AFR0_EL1 */
@ -290,11 +294,13 @@ static struct mrs_field id_aa64afr0_fields[] = {
MRS_FIELD_END,
};
/* ID_AA64AFR1_EL1 */
static struct mrs_field id_aa64afr1_fields[] = {
MRS_FIELD_END,
};
/* ID_AA64DFR0_EL1 */
static struct mrs_field_value id_aa64dfr0_pmsver[] = {
MRS_FIELD_VALUE(ID_AA64DFR0_PMSVer_NONE, ""),
@ -352,11 +358,13 @@ static struct mrs_field id_aa64dfr0_fields[] = {
MRS_FIELD_END,
};
/* ID_AA64DFR1 */
static struct mrs_field id_aa64dfr1_fields[] = {
MRS_FIELD_END,
};
/* ID_AA64ISAR0_EL1 */
static struct mrs_field_value id_aa64isar0_rndr[] = {
MRS_FIELD_VALUE(ID_AA64ISAR0_RNDR_NONE, ""),
@ -453,6 +461,7 @@ static struct mrs_field id_aa64isar0_fields[] = {
MRS_FIELD_END,
};
/* ID_AA64ISAR1_EL1 */
static struct mrs_field_value id_aa64isar1_i8mm[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64ISAR1, I8MM, NONE, IMPL),
@ -549,6 +558,7 @@ static struct mrs_field id_aa64isar1_fields[] = {
MRS_FIELD_END,
};
/* ID_AA64MMFR0_EL1 */
static struct mrs_field_value id_aa64mmfr0_tgran4[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR0, TGran4, NONE, IMPL),
@ -614,6 +624,7 @@ static struct mrs_field id_aa64mmfr0_fields[] = {
MRS_FIELD_END,
};
/* ID_AA64MMFR1_EL1 */
static struct mrs_field_value id_aa64mmfr1_xnx[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR1, XNX, NONE, IMPL),
@ -675,6 +686,7 @@ static struct mrs_field id_aa64mmfr1_fields[] = {
MRS_FIELD_END,
};
/* ID_AA64MMFR2_EL1 */
static struct mrs_field_value id_aa64mmfr2_nv[] = {
MRS_FIELD_VALUE_NONE_IMPL(ID_AA64MMFR2, NV, NONE, IMPL),
@ -725,6 +737,7 @@ static struct mrs_field id_aa64mmfr2_fields[] = {
MRS_FIELD_END,
};
/* ID_AA64PFR0_EL1 */
static struct mrs_field_value id_aa64pfr0_csv3[] = {
MRS_FIELD_VALUE(ID_AA64PFR0_CSV3_NONE, ""),
@ -832,6 +845,7 @@ static struct mrs_field id_aa64pfr0_fields[] = {
MRS_FIELD_END,
};
/* ID_AA64PFR1_EL1 */
static struct mrs_field_value id_aa64pfr1_bt[] = {
MRS_FIELD_VALUE(ID_AA64PFR1_BT_NONE, ""),