Remove the per-cpu pages used for copy and zero-ing pages of memory
for SMP; just use the same ones as UP. These weren't used without holding Giant anyway, and the routines that use them would have to be protected from pre-emption to avoid migrating cpus.
This commit is contained in:
parent
926581ede3
commit
3e899e1063
@ -201,14 +201,6 @@ ASSYM(GD_KTR_BUF_DATA, offsetof(struct globaldata, gd_ktr_buf_data));
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ASSYM(GD_CPUID, offsetof(struct globaldata, gd_cpuid));
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ASSYM(GD_CPU_LOCKID, offsetof(struct globaldata, gd_cpu_lockid));
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ASSYM(GD_OTHER_CPUS, offsetof(struct globaldata, gd_other_cpus));
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ASSYM(GD_PRV_CMAP1, offsetof(struct globaldata, gd_prv_CMAP1));
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ASSYM(GD_PRV_CMAP2, offsetof(struct globaldata, gd_prv_CMAP2));
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ASSYM(GD_PRV_CMAP3, offsetof(struct globaldata, gd_prv_CMAP3));
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ASSYM(GD_PRV_PMAP1, offsetof(struct globaldata, gd_prv_PMAP1));
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ASSYM(GD_PRV_CADDR1, offsetof(struct globaldata, gd_prv_CADDR1));
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ASSYM(GD_PRV_CADDR2, offsetof(struct globaldata, gd_prv_CADDR2));
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ASSYM(GD_PRV_CADDR3, offsetof(struct globaldata, gd_prv_CADDR3));
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ASSYM(GD_PRV_PADDR1, offsetof(struct globaldata, gd_prv_PADDR1));
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ASSYM(PS_IDLESTACK, offsetof(struct privatespace, idlestack));
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ASSYM(PS_IDLESTACK_TOP, sizeof(struct privatespace));
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@ -2005,14 +2005,6 @@ start_all_aps(u_int boot_addr)
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SLIST_INSERT_HEAD(&cpuhead, gd, gd_allcpu);
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gd->gd_cpuid = x;
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gd->gd_cpu_lockid = x << 24;
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gd->gd_prv_CMAP1 = &SMPpt[pg + 1];
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gd->gd_prv_CMAP2 = &SMPpt[pg + 2];
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gd->gd_prv_CMAP3 = &SMPpt[pg + 3];
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gd->gd_prv_PMAP1 = &SMPpt[pg + 4];
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gd->gd_prv_CADDR1 = SMP_prvspace[x].CPAGE1;
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gd->gd_prv_CADDR2 = SMP_prvspace[x].CPAGE2;
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gd->gd_prv_CADDR3 = SMP_prvspace[x].CPAGE3;
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gd->gd_prv_PADDR1 = (unsigned *)SMP_prvspace[x].PPAGE1;
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/* setup a vector to our boot code */
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*((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
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@ -2005,14 +2005,6 @@ start_all_aps(u_int boot_addr)
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SLIST_INSERT_HEAD(&cpuhead, gd, gd_allcpu);
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gd->gd_cpuid = x;
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gd->gd_cpu_lockid = x << 24;
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gd->gd_prv_CMAP1 = &SMPpt[pg + 1];
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gd->gd_prv_CMAP2 = &SMPpt[pg + 2];
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gd->gd_prv_CMAP3 = &SMPpt[pg + 3];
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gd->gd_prv_PMAP1 = &SMPpt[pg + 4];
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gd->gd_prv_CADDR1 = SMP_prvspace[x].CPAGE1;
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gd->gd_prv_CADDR2 = SMP_prvspace[x].CPAGE2;
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gd->gd_prv_CADDR3 = SMP_prvspace[x].CPAGE3;
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gd->gd_prv_PADDR1 = (unsigned *)SMP_prvspace[x].PPAGE1;
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/* setup a vector to our boot code */
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*((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
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@ -190,10 +190,9 @@ static caddr_t crashdumpmap;
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#ifdef SMP
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extern pt_entry_t *SMPpt;
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#else
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#endif
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static pt_entry_t *PMAP1 = 0;
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static unsigned *PADDR1 = 0;
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#endif
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static PMAP_INLINE void free_pv_entry __P((pv_entry_t pv));
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static unsigned * get_ptbase __P((pmap_t pmap));
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@ -284,9 +283,6 @@ pmap_bootstrap(firstaddr, loadaddr)
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{
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vm_offset_t va;
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pt_entry_t *pte;
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#ifdef SMP
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struct globaldata *gd;
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#endif
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avail_start = firstaddr;
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@ -357,12 +353,10 @@ pmap_bootstrap(firstaddr, loadaddr)
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SYSMAP(struct msgbuf *, msgbufmap, msgbufp,
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atop(round_page(MSGBUF_SIZE)))
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#if !defined(SMP)
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/*
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* ptemap is used for pmap_pte_quick
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*/
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SYSMAP(unsigned *, PMAP1, PADDR1, 1);
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#endif
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virtual_avail = va;
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@ -428,17 +422,6 @@ pmap_bootstrap(firstaddr, loadaddr)
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/* local apic is mapped on last page */
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SMPpt[NPTEPG - 1] = (pt_entry_t)(PG_V | PG_RW | PG_N | pgeflag |
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(cpu_apic_address & PG_FRAME));
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/* BSP does this itself, AP's get it pre-set */
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gd = &SMP_prvspace[0].globaldata;
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gd->gd_prv_CMAP1 = &SMPpt[1];
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gd->gd_prv_CMAP2 = &SMPpt[2];
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gd->gd_prv_CMAP3 = &SMPpt[3];
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gd->gd_prv_PMAP1 = &SMPpt[4];
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gd->gd_prv_CADDR1 = SMP_prvspace[0].CPAGE1;
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gd->gd_prv_CADDR2 = SMP_prvspace[0].CPAGE2;
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gd->gd_prv_CADDR3 = SMP_prvspace[0].CPAGE3;
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gd->gd_prv_PADDR1 = (unsigned *)SMP_prvspace[0].PPAGE1;
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#endif
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invltlb();
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@ -648,19 +631,11 @@ pmap_pte_quick(pmap, va)
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return (unsigned *) PTmap + index;
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}
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newpf = pde & PG_FRAME;
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#ifdef SMP
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if ( ((* (unsigned *) PCPU_GET(prv_PMAP1)) & PG_FRAME) != newpf) {
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* (unsigned *) PCPU_GET(prv_PMAP1) = newpf | PG_RW | PG_V;
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cpu_invlpg(PCPU_GET(prv_PADDR1));
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}
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return (unsigned *)(PCPU_GET(prv_PADDR1) + (index & (NPTEPG - 1)));
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#else
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if ( ((* (unsigned *) PMAP1) & PG_FRAME) != newpf) {
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* (unsigned *) PMAP1 = newpf | PG_RW | PG_V;
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invltlb_1pg((vm_offset_t) PADDR1);
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}
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return PADDR1 + ((unsigned) index & (NPTEPG - 1));
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#endif
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}
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return (0);
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}
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@ -2669,22 +2644,7 @@ void
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pmap_zero_page(phys)
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vm_offset_t phys;
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{
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#ifdef SMP
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if (*(int *) PCPU_GET(prv_CMAP3))
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panic("pmap_zero_page: prv_CMAP3 busy");
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*(int *) PCPU_GET(prv_CMAP3) = PG_V | PG_RW | (phys & PG_FRAME) | PG_A | PG_M;
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cpu_invlpg(PCPU_GET(prv_CADDR3));
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#if defined(I686_CPU)
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if (cpu_class == CPUCLASS_686)
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i686_pagezero(PCPU_GET(prv_CADDR3));
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else
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#endif
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bzero(PCPU_GET(prv_CADDR3), PAGE_SIZE);
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*(int *) PCPU_GET(prv_CMAP3) = 0;
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#else
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if (*(int *) CMAP2)
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panic("pmap_zero_page: CMAP2 busy");
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@ -2698,7 +2658,6 @@ pmap_zero_page(phys)
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#endif
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bzero(CADDR2, PAGE_SIZE);
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*(int *) CMAP2 = 0;
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#endif
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}
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/*
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@ -2713,22 +2672,7 @@ pmap_zero_page_area(phys, off, size)
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int off;
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int size;
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{
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#ifdef SMP
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if (*(int *) PCPU_GET(prv_CMAP3))
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panic("pmap_zero_page: prv_CMAP3 busy");
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*(int *) PCPU_GET(prv_CMAP3) = PG_V | PG_RW | (phys & PG_FRAME) | PG_A | PG_M;
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cpu_invlpg(PCPU_GET(prv_CADDR3));
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#if defined(I686_CPU)
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if (cpu_class == CPUCLASS_686 && off == 0 && size == PAGE_SIZE)
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i686_pagezero(PCPU_GET(prv_CADDR3));
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else
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#endif
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bzero((char *)PCPU_GET(prv_CADDR3) + off, size);
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*(int *) PCPU_GET(prv_CMAP3) = 0;
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#else
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if (*(int *) CMAP2)
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panic("pmap_zero_page: CMAP2 busy");
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@ -2742,7 +2686,6 @@ pmap_zero_page_area(phys, off, size)
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#endif
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bzero((char *)CADDR2 + off, size);
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*(int *) CMAP2 = 0;
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#endif
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}
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/*
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@ -2756,26 +2699,11 @@ pmap_copy_page(src, dst)
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vm_offset_t src;
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vm_offset_t dst;
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{
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#ifdef SMP
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if (*(int *) PCPU_GET(prv_CMAP1))
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panic("pmap_copy_page: prv_CMAP1 busy");
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if (*(int *) PCPU_GET(prv_CMAP2))
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panic("pmap_copy_page: prv_CMAP2 busy");
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*(int *) PCPU_GET(prv_CMAP1) = PG_V | (src & PG_FRAME) | PG_A;
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*(int *) PCPU_GET(prv_CMAP2) = PG_V | PG_RW | (dst & PG_FRAME) | PG_A | PG_M;
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cpu_invlpg(PCPU_GET(prv_CADDR1));
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cpu_invlpg(PCPU_GET(prv_CADDR2));
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bcopy(PCPU_GET(prv_CADDR1), PCPU_GET(prv_CADDR2), PAGE_SIZE);
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*(int *) PCPU_GET(prv_CMAP1) = 0;
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*(int *) PCPU_GET(prv_CMAP2) = 0;
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#else
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if (*(int *) CMAP1 || *(int *) CMAP2)
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panic("pmap_copy_page: CMAP busy");
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if (*(int *) CMAP1)
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panic("pmap_copy_page: CMAP1 busy");
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if (*(int *) CMAP2)
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panic("pmap_copy_page: CMAP2 busy");
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*(int *) CMAP1 = PG_V | (src & PG_FRAME) | PG_A;
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*(int *) CMAP2 = PG_V | PG_RW | (dst & PG_FRAME) | PG_A | PG_M;
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@ -2790,7 +2718,6 @@ pmap_copy_page(src, dst)
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*(int *) CMAP1 = 0;
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*(int *) CMAP2 = 0;
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#endif
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}
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@ -2005,14 +2005,6 @@ start_all_aps(u_int boot_addr)
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SLIST_INSERT_HEAD(&cpuhead, gd, gd_allcpu);
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gd->gd_cpuid = x;
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gd->gd_cpu_lockid = x << 24;
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gd->gd_prv_CMAP1 = &SMPpt[pg + 1];
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gd->gd_prv_CMAP2 = &SMPpt[pg + 2];
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gd->gd_prv_CMAP3 = &SMPpt[pg + 3];
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gd->gd_prv_PMAP1 = &SMPpt[pg + 4];
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gd->gd_prv_CADDR1 = SMP_prvspace[x].CPAGE1;
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gd->gd_prv_CADDR2 = SMP_prvspace[x].CPAGE2;
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gd->gd_prv_CADDR3 = SMP_prvspace[x].CPAGE3;
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gd->gd_prv_PADDR1 = (unsigned *)SMP_prvspace[x].PPAGE1;
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/* setup a vector to our boot code */
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*((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
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@ -29,9 +29,6 @@
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#ifndef _MACHINE_GLOBALDATA_H_
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#define _MACHINE_GLOBALDATA_H_
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/pmap.h>
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#include <machine/segments.h>
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#include <machine/tss.h>
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@ -69,14 +66,6 @@ struct globaldata {
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u_int gd_cpuid;
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u_int gd_cpu_lockid;
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u_int gd_other_cpus;
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pt_entry_t *gd_prv_CMAP1;
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pt_entry_t *gd_prv_CMAP2;
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pt_entry_t *gd_prv_CMAP3;
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pt_entry_t *gd_prv_PMAP1;
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caddr_t gd_prv_CADDR1;
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caddr_t gd_prv_CADDR2;
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caddr_t gd_prv_CADDR3;
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unsigned *gd_prv_PADDR1;
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u_int gd_astpending;
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SLIST_ENTRY(globaldata) gd_allcpu;
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int gd_witness_spin_check;
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@ -201,14 +201,6 @@ ASSYM(GD_KTR_BUF_DATA, offsetof(struct globaldata, gd_ktr_buf_data));
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ASSYM(GD_CPUID, offsetof(struct globaldata, gd_cpuid));
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ASSYM(GD_CPU_LOCKID, offsetof(struct globaldata, gd_cpu_lockid));
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ASSYM(GD_OTHER_CPUS, offsetof(struct globaldata, gd_other_cpus));
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ASSYM(GD_PRV_CMAP1, offsetof(struct globaldata, gd_prv_CMAP1));
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ASSYM(GD_PRV_CMAP2, offsetof(struct globaldata, gd_prv_CMAP2));
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ASSYM(GD_PRV_CMAP3, offsetof(struct globaldata, gd_prv_CMAP3));
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ASSYM(GD_PRV_PMAP1, offsetof(struct globaldata, gd_prv_PMAP1));
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ASSYM(GD_PRV_CADDR1, offsetof(struct globaldata, gd_prv_CADDR1));
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ASSYM(GD_PRV_CADDR2, offsetof(struct globaldata, gd_prv_CADDR2));
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ASSYM(GD_PRV_CADDR3, offsetof(struct globaldata, gd_prv_CADDR3));
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ASSYM(GD_PRV_PADDR1, offsetof(struct globaldata, gd_prv_PADDR1));
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ASSYM(PS_IDLESTACK, offsetof(struct privatespace, idlestack));
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ASSYM(PS_IDLESTACK_TOP, sizeof(struct privatespace));
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@ -2005,14 +2005,6 @@ start_all_aps(u_int boot_addr)
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SLIST_INSERT_HEAD(&cpuhead, gd, gd_allcpu);
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gd->gd_cpuid = x;
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gd->gd_cpu_lockid = x << 24;
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gd->gd_prv_CMAP1 = &SMPpt[pg + 1];
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gd->gd_prv_CMAP2 = &SMPpt[pg + 2];
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gd->gd_prv_CMAP3 = &SMPpt[pg + 3];
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gd->gd_prv_PMAP1 = &SMPpt[pg + 4];
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gd->gd_prv_CADDR1 = SMP_prvspace[x].CPAGE1;
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gd->gd_prv_CADDR2 = SMP_prvspace[x].CPAGE2;
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gd->gd_prv_CADDR3 = SMP_prvspace[x].CPAGE3;
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gd->gd_prv_PADDR1 = (unsigned *)SMP_prvspace[x].PPAGE1;
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/* setup a vector to our boot code */
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*((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
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@ -2005,14 +2005,6 @@ start_all_aps(u_int boot_addr)
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SLIST_INSERT_HEAD(&cpuhead, gd, gd_allcpu);
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gd->gd_cpuid = x;
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gd->gd_cpu_lockid = x << 24;
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gd->gd_prv_CMAP1 = &SMPpt[pg + 1];
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gd->gd_prv_CMAP2 = &SMPpt[pg + 2];
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gd->gd_prv_CMAP3 = &SMPpt[pg + 3];
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gd->gd_prv_PMAP1 = &SMPpt[pg + 4];
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gd->gd_prv_CADDR1 = SMP_prvspace[x].CPAGE1;
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gd->gd_prv_CADDR2 = SMP_prvspace[x].CPAGE2;
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gd->gd_prv_CADDR3 = SMP_prvspace[x].CPAGE3;
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gd->gd_prv_PADDR1 = (unsigned *)SMP_prvspace[x].PPAGE1;
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/* setup a vector to our boot code */
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*((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
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@ -190,10 +190,9 @@ static caddr_t crashdumpmap;
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#ifdef SMP
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extern pt_entry_t *SMPpt;
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#else
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#endif
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static pt_entry_t *PMAP1 = 0;
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static unsigned *PADDR1 = 0;
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#endif
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static PMAP_INLINE void free_pv_entry __P((pv_entry_t pv));
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static unsigned * get_ptbase __P((pmap_t pmap));
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@ -284,9 +283,6 @@ pmap_bootstrap(firstaddr, loadaddr)
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{
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vm_offset_t va;
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pt_entry_t *pte;
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#ifdef SMP
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struct globaldata *gd;
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#endif
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avail_start = firstaddr;
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@ -357,12 +353,10 @@ pmap_bootstrap(firstaddr, loadaddr)
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SYSMAP(struct msgbuf *, msgbufmap, msgbufp,
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atop(round_page(MSGBUF_SIZE)))
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#if !defined(SMP)
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/*
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* ptemap is used for pmap_pte_quick
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*/
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SYSMAP(unsigned *, PMAP1, PADDR1, 1);
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#endif
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virtual_avail = va;
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@ -428,17 +422,6 @@ pmap_bootstrap(firstaddr, loadaddr)
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/* local apic is mapped on last page */
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SMPpt[NPTEPG - 1] = (pt_entry_t)(PG_V | PG_RW | PG_N | pgeflag |
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(cpu_apic_address & PG_FRAME));
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/* BSP does this itself, AP's get it pre-set */
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gd = &SMP_prvspace[0].globaldata;
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gd->gd_prv_CMAP1 = &SMPpt[1];
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gd->gd_prv_CMAP2 = &SMPpt[2];
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gd->gd_prv_CMAP3 = &SMPpt[3];
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gd->gd_prv_PMAP1 = &SMPpt[4];
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gd->gd_prv_CADDR1 = SMP_prvspace[0].CPAGE1;
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gd->gd_prv_CADDR2 = SMP_prvspace[0].CPAGE2;
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gd->gd_prv_CADDR3 = SMP_prvspace[0].CPAGE3;
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gd->gd_prv_PADDR1 = (unsigned *)SMP_prvspace[0].PPAGE1;
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#endif
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invltlb();
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@ -648,19 +631,11 @@ pmap_pte_quick(pmap, va)
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return (unsigned *) PTmap + index;
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}
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newpf = pde & PG_FRAME;
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#ifdef SMP
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if ( ((* (unsigned *) PCPU_GET(prv_PMAP1)) & PG_FRAME) != newpf) {
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* (unsigned *) PCPU_GET(prv_PMAP1) = newpf | PG_RW | PG_V;
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cpu_invlpg(PCPU_GET(prv_PADDR1));
|
||||
}
|
||||
return (unsigned *)(PCPU_GET(prv_PADDR1) + (index & (NPTEPG - 1)));
|
||||
#else
|
||||
if ( ((* (unsigned *) PMAP1) & PG_FRAME) != newpf) {
|
||||
* (unsigned *) PMAP1 = newpf | PG_RW | PG_V;
|
||||
invltlb_1pg((vm_offset_t) PADDR1);
|
||||
}
|
||||
return PADDR1 + ((unsigned) index & (NPTEPG - 1));
|
||||
#endif
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
@ -2669,22 +2644,7 @@ void
|
||||
pmap_zero_page(phys)
|
||||
vm_offset_t phys;
|
||||
{
|
||||
#ifdef SMP
|
||||
if (*(int *) PCPU_GET(prv_CMAP3))
|
||||
panic("pmap_zero_page: prv_CMAP3 busy");
|
||||
|
||||
*(int *) PCPU_GET(prv_CMAP3) = PG_V | PG_RW | (phys & PG_FRAME) | PG_A | PG_M;
|
||||
cpu_invlpg(PCPU_GET(prv_CADDR3));
|
||||
|
||||
#if defined(I686_CPU)
|
||||
if (cpu_class == CPUCLASS_686)
|
||||
i686_pagezero(PCPU_GET(prv_CADDR3));
|
||||
else
|
||||
#endif
|
||||
bzero(PCPU_GET(prv_CADDR3), PAGE_SIZE);
|
||||
|
||||
*(int *) PCPU_GET(prv_CMAP3) = 0;
|
||||
#else
|
||||
if (*(int *) CMAP2)
|
||||
panic("pmap_zero_page: CMAP2 busy");
|
||||
|
||||
@ -2698,7 +2658,6 @@ pmap_zero_page(phys)
|
||||
#endif
|
||||
bzero(CADDR2, PAGE_SIZE);
|
||||
*(int *) CMAP2 = 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2713,22 +2672,7 @@ pmap_zero_page_area(phys, off, size)
|
||||
int off;
|
||||
int size;
|
||||
{
|
||||
#ifdef SMP
|
||||
if (*(int *) PCPU_GET(prv_CMAP3))
|
||||
panic("pmap_zero_page: prv_CMAP3 busy");
|
||||
|
||||
*(int *) PCPU_GET(prv_CMAP3) = PG_V | PG_RW | (phys & PG_FRAME) | PG_A | PG_M;
|
||||
cpu_invlpg(PCPU_GET(prv_CADDR3));
|
||||
|
||||
#if defined(I686_CPU)
|
||||
if (cpu_class == CPUCLASS_686 && off == 0 && size == PAGE_SIZE)
|
||||
i686_pagezero(PCPU_GET(prv_CADDR3));
|
||||
else
|
||||
#endif
|
||||
bzero((char *)PCPU_GET(prv_CADDR3) + off, size);
|
||||
|
||||
*(int *) PCPU_GET(prv_CMAP3) = 0;
|
||||
#else
|
||||
if (*(int *) CMAP2)
|
||||
panic("pmap_zero_page: CMAP2 busy");
|
||||
|
||||
@ -2742,7 +2686,6 @@ pmap_zero_page_area(phys, off, size)
|
||||
#endif
|
||||
bzero((char *)CADDR2 + off, size);
|
||||
*(int *) CMAP2 = 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2756,26 +2699,11 @@ pmap_copy_page(src, dst)
|
||||
vm_offset_t src;
|
||||
vm_offset_t dst;
|
||||
{
|
||||
#ifdef SMP
|
||||
if (*(int *) PCPU_GET(prv_CMAP1))
|
||||
panic("pmap_copy_page: prv_CMAP1 busy");
|
||||
if (*(int *) PCPU_GET(prv_CMAP2))
|
||||
panic("pmap_copy_page: prv_CMAP2 busy");
|
||||
|
||||
*(int *) PCPU_GET(prv_CMAP1) = PG_V | (src & PG_FRAME) | PG_A;
|
||||
*(int *) PCPU_GET(prv_CMAP2) = PG_V | PG_RW | (dst & PG_FRAME) | PG_A | PG_M;
|
||||
|
||||
cpu_invlpg(PCPU_GET(prv_CADDR1));
|
||||
cpu_invlpg(PCPU_GET(prv_CADDR2));
|
||||
|
||||
bcopy(PCPU_GET(prv_CADDR1), PCPU_GET(prv_CADDR2), PAGE_SIZE);
|
||||
|
||||
*(int *) PCPU_GET(prv_CMAP1) = 0;
|
||||
*(int *) PCPU_GET(prv_CMAP2) = 0;
|
||||
|
||||
#else
|
||||
if (*(int *) CMAP1 || *(int *) CMAP2)
|
||||
panic("pmap_copy_page: CMAP busy");
|
||||
if (*(int *) CMAP1)
|
||||
panic("pmap_copy_page: CMAP1 busy");
|
||||
if (*(int *) CMAP2)
|
||||
panic("pmap_copy_page: CMAP2 busy");
|
||||
|
||||
*(int *) CMAP1 = PG_V | (src & PG_FRAME) | PG_A;
|
||||
*(int *) CMAP2 = PG_V | PG_RW | (dst & PG_FRAME) | PG_A | PG_M;
|
||||
@ -2790,7 +2718,6 @@ pmap_copy_page(src, dst)
|
||||
|
||||
*(int *) CMAP1 = 0;
|
||||
*(int *) CMAP2 = 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
@ -29,9 +29,6 @@
|
||||
#ifndef _MACHINE_GLOBALDATA_H_
|
||||
#define _MACHINE_GLOBALDATA_H_
|
||||
|
||||
#include <vm/vm.h>
|
||||
#include <vm/pmap.h>
|
||||
#include <machine/pmap.h>
|
||||
#include <machine/segments.h>
|
||||
#include <machine/tss.h>
|
||||
|
||||
@ -69,14 +66,6 @@ struct globaldata {
|
||||
u_int gd_cpuid;
|
||||
u_int gd_cpu_lockid;
|
||||
u_int gd_other_cpus;
|
||||
pt_entry_t *gd_prv_CMAP1;
|
||||
pt_entry_t *gd_prv_CMAP2;
|
||||
pt_entry_t *gd_prv_CMAP3;
|
||||
pt_entry_t *gd_prv_PMAP1;
|
||||
caddr_t gd_prv_CADDR1;
|
||||
caddr_t gd_prv_CADDR2;
|
||||
caddr_t gd_prv_CADDR3;
|
||||
unsigned *gd_prv_PADDR1;
|
||||
u_int gd_astpending;
|
||||
SLIST_ENTRY(globaldata) gd_allcpu;
|
||||
int gd_witness_spin_check;
|
||||
|
@ -2005,14 +2005,6 @@ start_all_aps(u_int boot_addr)
|
||||
SLIST_INSERT_HEAD(&cpuhead, gd, gd_allcpu);
|
||||
gd->gd_cpuid = x;
|
||||
gd->gd_cpu_lockid = x << 24;
|
||||
gd->gd_prv_CMAP1 = &SMPpt[pg + 1];
|
||||
gd->gd_prv_CMAP2 = &SMPpt[pg + 2];
|
||||
gd->gd_prv_CMAP3 = &SMPpt[pg + 3];
|
||||
gd->gd_prv_PMAP1 = &SMPpt[pg + 4];
|
||||
gd->gd_prv_CADDR1 = SMP_prvspace[x].CPAGE1;
|
||||
gd->gd_prv_CADDR2 = SMP_prvspace[x].CPAGE2;
|
||||
gd->gd_prv_CADDR3 = SMP_prvspace[x].CPAGE3;
|
||||
gd->gd_prv_PADDR1 = (unsigned *)SMP_prvspace[x].PPAGE1;
|
||||
|
||||
/* setup a vector to our boot code */
|
||||
*((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
|
||||
|
@ -29,9 +29,6 @@
|
||||
#ifndef _MACHINE_GLOBALDATA_H_
|
||||
#define _MACHINE_GLOBALDATA_H_
|
||||
|
||||
#include <vm/vm.h>
|
||||
#include <vm/pmap.h>
|
||||
#include <machine/pmap.h>
|
||||
#include <machine/segments.h>
|
||||
#include <machine/tss.h>
|
||||
|
||||
@ -69,14 +66,6 @@ struct globaldata {
|
||||
u_int gd_cpuid;
|
||||
u_int gd_cpu_lockid;
|
||||
u_int gd_other_cpus;
|
||||
pt_entry_t *gd_prv_CMAP1;
|
||||
pt_entry_t *gd_prv_CMAP2;
|
||||
pt_entry_t *gd_prv_CMAP3;
|
||||
pt_entry_t *gd_prv_PMAP1;
|
||||
caddr_t gd_prv_CADDR1;
|
||||
caddr_t gd_prv_CADDR2;
|
||||
caddr_t gd_prv_CADDR3;
|
||||
unsigned *gd_prv_PADDR1;
|
||||
u_int gd_astpending;
|
||||
SLIST_ENTRY(globaldata) gd_allcpu;
|
||||
int gd_witness_spin_check;
|
||||
|
@ -2005,14 +2005,6 @@ start_all_aps(u_int boot_addr)
|
||||
SLIST_INSERT_HEAD(&cpuhead, gd, gd_allcpu);
|
||||
gd->gd_cpuid = x;
|
||||
gd->gd_cpu_lockid = x << 24;
|
||||
gd->gd_prv_CMAP1 = &SMPpt[pg + 1];
|
||||
gd->gd_prv_CMAP2 = &SMPpt[pg + 2];
|
||||
gd->gd_prv_CMAP3 = &SMPpt[pg + 3];
|
||||
gd->gd_prv_PMAP1 = &SMPpt[pg + 4];
|
||||
gd->gd_prv_CADDR1 = SMP_prvspace[x].CPAGE1;
|
||||
gd->gd_prv_CADDR2 = SMP_prvspace[x].CPAGE2;
|
||||
gd->gd_prv_CADDR3 = SMP_prvspace[x].CPAGE3;
|
||||
gd->gd_prv_PADDR1 = (unsigned *)SMP_prvspace[x].PPAGE1;
|
||||
|
||||
/* setup a vector to our boot code */
|
||||
*((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
|
||||
|
@ -42,7 +42,6 @@
|
||||
#ifndef _SYS_PROC_H_
|
||||
#define _SYS_PROC_H_
|
||||
|
||||
#include <machine/proc.h> /* Machine-dependent proc substruct. */
|
||||
#include <sys/callout.h> /* For struct callout. */
|
||||
#include <sys/event.h> /* For struct klist. */
|
||||
#include <sys/filedesc.h>
|
||||
@ -53,6 +52,7 @@
|
||||
#include <sys/time.h> /* For structs itimerval, timeval. */
|
||||
#endif
|
||||
#include <sys/ucred.h>
|
||||
#include <machine/proc.h> /* Machine-dependent proc substruct. */
|
||||
|
||||
/*
|
||||
* One structure allocated per session.
|
||||
|
Loading…
Reference in New Issue
Block a user