amd64 pmap: fix PCID mode invalidations
When r362031 moved local TLB invalidation after shootdown IPI send, it moved too much. In particular, PCID-mode clearing of the pm_gen generation counters must occur before IPIs are send, which is in fact described by the comment before seq_cst fence in the invalidation functions. Fix it by extracting pm_gen clearing into new helper pmap_invalidate_preipi(), which is executed before a call to smp_masked_tlb_shootdown(). Rest of the local invalidation callbacks is simplified as result, and become very similar to the remote shootdown handlers (to be merged in some future). Move pin of the thread to pmap_invalidate_preipi(), and do unpin in smp_masked_tlb_shootdown(). Reported and tested by: mjg (previous version) Reviewed by: alc, cem (previous version), markj Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D227588
This commit is contained in:
parent
d5fe384b4d
commit
3fd989da91
@ -635,11 +635,11 @@ invl_scoreboard_slot(u_int cpu)
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}
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/*
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* Used by pmap to request cache or TLB invalidation on local and
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* remote processors. Mask provides the set of remote CPUs which are
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* Used by the pmap to request cache or TLB invalidation on local and
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* remote processors. Mask provides the set of remote CPUs that are
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* to be signalled with the invalidation IPI. As an optimization, the
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* curcpu_cb callback is invoked on the calling CPU while waiting for
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* remote CPUs to complete the operation.
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* curcpu_cb callback is invoked on the calling CPU in a critical
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* section while waiting for the remote CPUs to complete the operation.
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*
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* The callback function is called unconditionally on the caller's
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* underlying processor, even when this processor is not set in the
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@ -649,6 +649,9 @@ invl_scoreboard_slot(u_int cpu)
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* Interrupts must be enabled when calling the function with smp
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* started, to avoid deadlock with other IPIs that are protected with
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* smp_ipi_mtx spinlock at the initiator side.
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*
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* Function must be called with the thread pinned, and it unpins on
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* completion.
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*/
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static void
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smp_targeted_tlb_shootdown(cpuset_t mask, pmap_t pmap, vm_offset_t addr1,
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@ -662,23 +665,21 @@ smp_targeted_tlb_shootdown(cpuset_t mask, pmap_t pmap, vm_offset_t addr1,
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* It is not necessary to signal other CPUs while booting or
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* when in the debugger.
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*/
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if (kdb_active || KERNEL_PANICKED() || !smp_started) {
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curcpu_cb(pmap, addr1, addr2);
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return;
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}
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if (kdb_active || KERNEL_PANICKED() || !smp_started)
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goto local_cb;
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sched_pin();
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KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
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/*
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* Check for other cpus. Return if none.
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*/
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if (CPU_ISFULLSET(&mask)) {
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if (mp_ncpus <= 1)
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goto nospinexit;
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goto local_cb;
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} else {
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CPU_CLR(PCPU_GET(cpuid), &mask);
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if (CPU_EMPTY(&mask))
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goto nospinexit;
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goto local_cb;
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}
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/*
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@ -734,13 +735,22 @@ smp_targeted_tlb_shootdown(cpuset_t mask, pmap_t pmap, vm_offset_t addr1,
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while (atomic_load_int(p_cpudone) != generation)
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ia32_pause();
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}
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critical_exit();
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/*
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* Unpin before leaving critical section. If the thread owes
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* preemption, this allows scheduler to select thread on any
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* CPU from its cpuset.
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*/
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sched_unpin();
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critical_exit();
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return;
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nospinexit:
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local_cb:
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critical_enter();
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curcpu_cb(pmap, addr1, addr2);
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sched_unpin();
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critical_exit();
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}
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void
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@ -2773,54 +2773,19 @@ pmap_invalidate_ept(pmap_t pmap)
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static cpuset_t
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pmap_invalidate_cpu_mask(pmap_t pmap)
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{
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return (pmap == kernel_pmap ? all_cpus : pmap->pm_active);
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}
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static inline void
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pmap_invalidate_page_pcid(pmap_t pmap, vm_offset_t va,
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const bool invpcid_works1)
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pmap_invalidate_preipi_pcid(pmap_t pmap)
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{
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struct invpcid_descr d;
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uint64_t kcr3, ucr3;
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uint32_t pcid;
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u_int cpuid, i;
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sched_pin();
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cpuid = PCPU_GET(cpuid);
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if (pmap == PCPU_GET(curpmap)) {
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if (pmap->pm_ucr3 != PMAP_NO_CR3 &&
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/*
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* If we context-switched right after
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* PCPU_GET(ucr3_load_mask), we could read the
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* ~CR3_PCID_SAVE mask, which causes us to skip
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* the code below to invalidate user pages. This
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* is handled in pmap_activate_sw_pcid_pti() by
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* clearing pm_gen if ucr3_load_mask is ~CR3_PCID_SAVE.
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*/
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PCPU_GET(ucr3_load_mask) == PMAP_UCR3_NOMASK) {
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/*
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* Because pm_pcid is recalculated on a
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* context switch, we must disable switching.
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* Otherwise, we might use a stale value
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* below.
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*/
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critical_enter();
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pcid = pmap->pm_pcids[cpuid].pm_pcid;
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if (invpcid_works1) {
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d.pcid = pcid | PMAP_PCID_USER_PT;
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d.pad = 0;
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d.addr = va;
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invpcid(&d, INVPCID_ADDR);
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} else {
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kcr3 = pmap->pm_cr3 | pcid | CR3_PCID_SAVE;
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ucr3 = pmap->pm_ucr3 | pcid |
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PMAP_PCID_USER_PT | CR3_PCID_SAVE;
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pmap_pti_pcid_invlpg(ucr3, kcr3, va);
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}
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critical_exit();
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}
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} else
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pmap->pm_pcids[cpuid].pm_gen = 0;
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if (pmap != PCPU_GET(curpmap))
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cpuid = 0xffffffff; /* An impossible value */
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CPU_FOREACH(i) {
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if (cpuid != i)
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@ -2841,51 +2806,98 @@ pmap_invalidate_page_pcid(pmap_t pmap, vm_offset_t va,
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}
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static void
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pmap_invalidate_page_pcid_invpcid(pmap_t pmap, vm_offset_t va)
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pmap_invalidate_preipi_nopcid(pmap_t pmap __unused)
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{
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sched_pin();
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}
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pmap_invalidate_page_pcid(pmap, va, true);
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DEFINE_IFUNC(static, void, pmap_invalidate_preipi, (pmap_t))
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{
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return (pmap_pcid_enabled ? pmap_invalidate_preipi_pcid :
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pmap_invalidate_preipi_nopcid);
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}
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static inline void
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pmap_invalidate_page_pcid_cb(pmap_t pmap, vm_offset_t va,
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const bool invpcid_works1)
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{
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struct invpcid_descr d;
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uint64_t kcr3, ucr3;
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uint32_t pcid;
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u_int cpuid;
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/*
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* Because pm_pcid is recalculated on a context switch, we
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* must ensure there is no preemption, not just pinning.
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* Otherwise, we might use a stale value below.
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*/
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CRITICAL_ASSERT(curthread);
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/*
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* No need to do anything with user page tables invalidation
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* if there is no user page table, or invalidation is deferred
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* until the return to userspace. ucr3_load_mask is stable
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* because we have preemption disabled.
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*/
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if (pmap->pm_ucr3 == PMAP_NO_CR3 ||
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PCPU_GET(ucr3_load_mask) != PMAP_UCR3_NOMASK)
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return;
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cpuid = PCPU_GET(cpuid);
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pcid = pmap->pm_pcids[cpuid].pm_pcid;
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if (invpcid_works1) {
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d.pcid = pcid | PMAP_PCID_USER_PT;
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d.pad = 0;
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d.addr = va;
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invpcid(&d, INVPCID_ADDR);
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} else {
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kcr3 = pmap->pm_cr3 | pcid | CR3_PCID_SAVE;
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ucr3 = pmap->pm_ucr3 | pcid | PMAP_PCID_USER_PT | CR3_PCID_SAVE;
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pmap_pti_pcid_invlpg(ucr3, kcr3, va);
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}
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}
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static void
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pmap_invalidate_page_pcid_noinvpcid(pmap_t pmap, vm_offset_t va)
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pmap_invalidate_page_pcid_invpcid_cb(pmap_t pmap, vm_offset_t va)
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{
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pmap_invalidate_page_pcid(pmap, va, false);
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pmap_invalidate_page_pcid_cb(pmap, va, true);
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}
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static void
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pmap_invalidate_page_nopcid(pmap_t pmap, vm_offset_t va)
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pmap_invalidate_page_pcid_noinvpcid_cb(pmap_t pmap, vm_offset_t va)
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{
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pmap_invalidate_page_pcid_cb(pmap, va, false);
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}
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static void
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pmap_invalidate_page_nopcid_cb(pmap_t pmap __unused, vm_offset_t va __unused)
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{
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}
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DEFINE_IFUNC(static, void, pmap_invalidate_page_mode, (pmap_t, vm_offset_t))
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DEFINE_IFUNC(static, void, pmap_invalidate_page_cb, (pmap_t, vm_offset_t))
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{
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if (pmap_pcid_enabled)
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return (invpcid_works ? pmap_invalidate_page_pcid_invpcid :
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pmap_invalidate_page_pcid_noinvpcid);
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return (pmap_invalidate_page_nopcid);
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return (invpcid_works ? pmap_invalidate_page_pcid_invpcid_cb :
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pmap_invalidate_page_pcid_noinvpcid_cb);
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return (pmap_invalidate_page_nopcid_cb);
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}
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static void
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pmap_invalidate_page_curcpu_cb(pmap_t pmap, vm_offset_t va,
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vm_offset_t addr2 __unused)
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{
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if (pmap == kernel_pmap) {
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invlpg(va);
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} else {
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if (pmap == PCPU_GET(curpmap))
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invlpg(va);
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pmap_invalidate_page_mode(pmap, va);
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} else if (pmap == PCPU_GET(curpmap)) {
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invlpg(va);
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pmap_invalidate_page_cb(pmap, va);
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}
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}
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void
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pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
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{
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if (pmap_type_guest(pmap)) {
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pmap_invalidate_ept(pmap);
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return;
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@ -2894,6 +2906,7 @@ pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
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KASSERT(pmap->pm_type == PT_X86,
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("pmap_invalidate_page: invalid type %d", pmap->pm_type));
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pmap_invalidate_preipi(pmap);
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smp_masked_invlpg(pmap_invalidate_cpu_mask(pmap), va, pmap,
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pmap_invalidate_page_curcpu_cb);
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}
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@ -2902,74 +2915,63 @@ pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
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#define PMAP_INVLPG_THRESHOLD (4 * 1024 * PAGE_SIZE)
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static void
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pmap_invalidate_range_pcid(pmap_t pmap, vm_offset_t sva, vm_offset_t eva,
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pmap_invalidate_range_pcid_cb(pmap_t pmap, vm_offset_t sva, vm_offset_t eva,
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const bool invpcid_works1)
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{
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struct invpcid_descr d;
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uint64_t kcr3, ucr3;
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uint32_t pcid;
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u_int cpuid, i;
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u_int cpuid;
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CRITICAL_ASSERT(curthread);
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if (pmap != PCPU_GET(curpmap) ||
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pmap->pm_ucr3 == PMAP_NO_CR3 ||
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PCPU_GET(ucr3_load_mask) != PMAP_UCR3_NOMASK)
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return;
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cpuid = PCPU_GET(cpuid);
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if (pmap == PCPU_GET(curpmap)) {
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if (pmap->pm_ucr3 != PMAP_NO_CR3 &&
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PCPU_GET(ucr3_load_mask) == PMAP_UCR3_NOMASK) {
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critical_enter();
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pcid = pmap->pm_pcids[cpuid].pm_pcid;
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if (invpcid_works1) {
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d.pcid = pcid | PMAP_PCID_USER_PT;
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d.pad = 0;
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d.addr = sva;
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for (; d.addr < eva; d.addr += PAGE_SIZE)
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invpcid(&d, INVPCID_ADDR);
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} else {
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kcr3 = pmap->pm_cr3 | pcid | CR3_PCID_SAVE;
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ucr3 = pmap->pm_ucr3 | pcid |
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PMAP_PCID_USER_PT | CR3_PCID_SAVE;
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pmap_pti_pcid_invlrng(ucr3, kcr3, sva, eva);
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}
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critical_exit();
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}
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} else
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pmap->pm_pcids[cpuid].pm_gen = 0;
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CPU_FOREACH(i) {
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if (cpuid != i)
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pmap->pm_pcids[i].pm_gen = 0;
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pcid = pmap->pm_pcids[cpuid].pm_pcid;
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if (invpcid_works1) {
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d.pcid = pcid | PMAP_PCID_USER_PT;
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d.pad = 0;
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for (d.addr = sva; d.addr < eva; d.addr += PAGE_SIZE)
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invpcid(&d, INVPCID_ADDR);
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} else {
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kcr3 = pmap->pm_cr3 | pcid | CR3_PCID_SAVE;
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ucr3 = pmap->pm_ucr3 | pcid | PMAP_PCID_USER_PT | CR3_PCID_SAVE;
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pmap_pti_pcid_invlrng(ucr3, kcr3, sva, eva);
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}
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/* See the comment in pmap_invalidate_page_pcid(). */
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atomic_thread_fence_seq_cst();
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}
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static void
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pmap_invalidate_range_pcid_invpcid(pmap_t pmap, vm_offset_t sva,
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pmap_invalidate_range_pcid_invpcid_cb(pmap_t pmap, vm_offset_t sva,
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vm_offset_t eva)
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{
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pmap_invalidate_range_pcid(pmap, sva, eva, true);
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pmap_invalidate_range_pcid_cb(pmap, sva, eva, true);
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}
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static void
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pmap_invalidate_range_pcid_noinvpcid(pmap_t pmap, vm_offset_t sva,
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pmap_invalidate_range_pcid_noinvpcid_cb(pmap_t pmap, vm_offset_t sva,
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vm_offset_t eva)
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{
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pmap_invalidate_range_pcid(pmap, sva, eva, false);
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pmap_invalidate_range_pcid_cb(pmap, sva, eva, false);
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}
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static void
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pmap_invalidate_range_nopcid(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
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pmap_invalidate_range_nopcid_cb(pmap_t pmap __unused, vm_offset_t sva __unused,
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vm_offset_t eva __unused)
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{
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}
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DEFINE_IFUNC(static, void, pmap_invalidate_range_mode, (pmap_t, vm_offset_t,
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DEFINE_IFUNC(static, void, pmap_invalidate_range_cb, (pmap_t, vm_offset_t,
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vm_offset_t))
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{
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if (pmap_pcid_enabled)
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return (invpcid_works ? pmap_invalidate_range_pcid_invpcid :
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pmap_invalidate_range_pcid_noinvpcid);
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return (pmap_invalidate_range_nopcid);
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return (invpcid_works ? pmap_invalidate_range_pcid_invpcid_cb :
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pmap_invalidate_range_pcid_noinvpcid_cb);
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return (pmap_invalidate_range_nopcid_cb);
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}
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static void
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@ -2980,19 +2982,16 @@ pmap_invalidate_range_curcpu_cb(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
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if (pmap == kernel_pmap) {
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for (addr = sva; addr < eva; addr += PAGE_SIZE)
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invlpg(addr);
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} else {
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if (pmap == PCPU_GET(curpmap)) {
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for (addr = sva; addr < eva; addr += PAGE_SIZE)
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invlpg(addr);
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}
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pmap_invalidate_range_mode(pmap, sva, eva);
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} else if (pmap == PCPU_GET(curpmap)) {
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for (addr = sva; addr < eva; addr += PAGE_SIZE)
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invlpg(addr);
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pmap_invalidate_range_cb(pmap, sva, eva);
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}
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}
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void
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pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
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{
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if (eva - sva >= PMAP_INVLPG_THRESHOLD) {
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pmap_invalidate_all(pmap);
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return;
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@ -3006,17 +3005,18 @@ pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
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KASSERT(pmap->pm_type == PT_X86,
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("pmap_invalidate_range: invalid type %d", pmap->pm_type));
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pmap_invalidate_preipi(pmap);
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smp_masked_invlpg_range(pmap_invalidate_cpu_mask(pmap), sva, eva, pmap,
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pmap_invalidate_range_curcpu_cb);
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}
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static inline void
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pmap_invalidate_all_pcid(pmap_t pmap, bool invpcid_works1)
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pmap_invalidate_all_pcid_cb(pmap_t pmap, bool invpcid_works1)
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{
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struct invpcid_descr d;
|
||||
uint64_t kcr3;
|
||||
uint32_t pcid;
|
||||
u_int cpuid, i;
|
||||
u_int cpuid;
|
||||
|
||||
if (pmap == kernel_pmap) {
|
||||
if (invpcid_works1) {
|
||||
@ -3025,79 +3025,64 @@ pmap_invalidate_all_pcid(pmap_t pmap, bool invpcid_works1)
|
||||
} else {
|
||||
invltlb_glob();
|
||||
}
|
||||
} else {
|
||||
} else if (pmap == PCPU_GET(curpmap)) {
|
||||
CRITICAL_ASSERT(curthread);
|
||||
cpuid = PCPU_GET(cpuid);
|
||||
if (pmap == PCPU_GET(curpmap)) {
|
||||
critical_enter();
|
||||
pcid = pmap->pm_pcids[cpuid].pm_pcid;
|
||||
if (invpcid_works1) {
|
||||
d.pcid = pcid;
|
||||
d.pad = 0;
|
||||
d.addr = 0;
|
||||
invpcid(&d, INVPCID_CTX);
|
||||
} else {
|
||||
kcr3 = pmap->pm_cr3 | pcid;
|
||||
load_cr3(kcr3);
|
||||
}
|
||||
if (pmap->pm_ucr3 != PMAP_NO_CR3)
|
||||
PCPU_SET(ucr3_load_mask, ~CR3_PCID_SAVE);
|
||||
critical_exit();
|
||||
} else
|
||||
pmap->pm_pcids[cpuid].pm_gen = 0;
|
||||
CPU_FOREACH(i) {
|
||||
if (cpuid != i)
|
||||
pmap->pm_pcids[i].pm_gen = 0;
|
||||
|
||||
pcid = pmap->pm_pcids[cpuid].pm_pcid;
|
||||
if (invpcid_works1) {
|
||||
d.pcid = pcid;
|
||||
d.pad = 0;
|
||||
d.addr = 0;
|
||||
invpcid(&d, INVPCID_CTX);
|
||||
} else {
|
||||
kcr3 = pmap->pm_cr3 | pcid;
|
||||
load_cr3(kcr3);
|
||||
}
|
||||
if (pmap->pm_ucr3 != PMAP_NO_CR3)
|
||||
PCPU_SET(ucr3_load_mask, ~CR3_PCID_SAVE);
|
||||
}
|
||||
/* See the comment in pmap_invalidate_page_pcid(). */
|
||||
atomic_thread_fence_seq_cst();
|
||||
}
|
||||
|
||||
static void
|
||||
pmap_invalidate_all_pcid_invpcid(pmap_t pmap)
|
||||
pmap_invalidate_all_pcid_invpcid_cb(pmap_t pmap)
|
||||
{
|
||||
|
||||
pmap_invalidate_all_pcid(pmap, true);
|
||||
pmap_invalidate_all_pcid_cb(pmap, true);
|
||||
}
|
||||
|
||||
static void
|
||||
pmap_invalidate_all_pcid_noinvpcid(pmap_t pmap)
|
||||
pmap_invalidate_all_pcid_noinvpcid_cb(pmap_t pmap)
|
||||
{
|
||||
|
||||
pmap_invalidate_all_pcid(pmap, false);
|
||||
pmap_invalidate_all_pcid_cb(pmap, false);
|
||||
}
|
||||
|
||||
static void
|
||||
pmap_invalidate_all_nopcid(pmap_t pmap)
|
||||
pmap_invalidate_all_nopcid_cb(pmap_t pmap)
|
||||
{
|
||||
|
||||
if (pmap == kernel_pmap)
|
||||
invltlb_glob();
|
||||
else if (pmap == PCPU_GET(curpmap))
|
||||
invltlb();
|
||||
}
|
||||
|
||||
DEFINE_IFUNC(static, void, pmap_invalidate_all_mode, (pmap_t))
|
||||
DEFINE_IFUNC(static, void, pmap_invalidate_all_cb, (pmap_t))
|
||||
{
|
||||
|
||||
if (pmap_pcid_enabled)
|
||||
return (invpcid_works ? pmap_invalidate_all_pcid_invpcid :
|
||||
pmap_invalidate_all_pcid_noinvpcid);
|
||||
return (pmap_invalidate_all_nopcid);
|
||||
return (invpcid_works ? pmap_invalidate_all_pcid_invpcid_cb :
|
||||
pmap_invalidate_all_pcid_noinvpcid_cb);
|
||||
return (pmap_invalidate_all_nopcid_cb);
|
||||
}
|
||||
|
||||
static void
|
||||
pmap_invalidate_all_curcpu_cb(pmap_t pmap, vm_offset_t addr1 __unused,
|
||||
vm_offset_t addr2 __unused)
|
||||
{
|
||||
|
||||
pmap_invalidate_all_mode(pmap);
|
||||
pmap_invalidate_all_cb(pmap);
|
||||
}
|
||||
|
||||
void
|
||||
pmap_invalidate_all(pmap_t pmap)
|
||||
{
|
||||
|
||||
if (pmap_type_guest(pmap)) {
|
||||
pmap_invalidate_ept(pmap);
|
||||
return;
|
||||
@ -3106,6 +3091,7 @@ pmap_invalidate_all(pmap_t pmap)
|
||||
KASSERT(pmap->pm_type == PT_X86,
|
||||
("pmap_invalidate_all: invalid type %d", pmap->pm_type));
|
||||
|
||||
pmap_invalidate_preipi(pmap);
|
||||
smp_masked_invltlb(pmap_invalidate_cpu_mask(pmap), pmap,
|
||||
pmap_invalidate_all_curcpu_cb);
|
||||
}
|
||||
@ -3114,14 +3100,13 @@ static void
|
||||
pmap_invalidate_cache_curcpu_cb(pmap_t pmap __unused, vm_offset_t va __unused,
|
||||
vm_offset_t addr2 __unused)
|
||||
{
|
||||
|
||||
wbinvd();
|
||||
}
|
||||
|
||||
void
|
||||
pmap_invalidate_cache(void)
|
||||
{
|
||||
|
||||
sched_pin();
|
||||
smp_cache_flush(pmap_invalidate_cache_curcpu_cb);
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user