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Offset 0x6810 is RX-RISC event register. Rename BGE_CPU_EVENT with

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BGE_RX_CPU_EVENT for readability.
Additionally define BGE_TX_CPU_EVENT for TX-RSIC event register(BCM570[0-4] only).
This commit is contained in:
Pyun YongHyeon 2011-10-26 23:22:32 +00:00
parent 36d7cf2f1c
commit 3fed2d5d77
2 changed files with 7 additions and 6 deletions
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10
sys/dev/bge/if_bge.c
View File

@ -1363,11 +1363,11 @@ bge_stop_fw(struct bge_softc *sc)
if (sc->bge_asf_mode) {
bge_writemem_ind(sc, BGE_SRAM_FW_CMD_MB, BGE_FW_PAUSE);
CSR_WRITE_4(sc, BGE_CPU_EVENT,
CSR_READ_4(sc, BGE_CPU_EVENT) | (1 << 14));
CSR_WRITE_4(sc, BGE_RX_CPU_EVENT,
CSR_READ_4(sc, BGE_RX_CPU_EVENT) | (1 << 14));
for (i = 0; i < 100; i++ ) {
if (!(CSR_READ_4(sc, BGE_CPU_EVENT) & (1 << 14)))
if (!(CSR_READ_4(sc, BGE_RX_CPU_EVENT) & (1 << 14)))
break;
DELAY(10);
}
@ -4104,8 +4104,8 @@ bge_asf_driver_up(struct bge_softc *sc)
BGE_FW_DRV_ALIVE);
bge_writemem_ind(sc, BGE_SRAM_FW_CMD_LEN_MB, 4);
bge_writemem_ind(sc, BGE_SRAM_FW_CMD_DATA_MB, 3);
CSR_WRITE_4(sc, BGE_CPU_EVENT,
CSR_READ_4(sc, BGE_CPU_EVENT) | (1 << 14));
CSR_WRITE_4(sc, BGE_RX_CPU_EVENT,
CSR_READ_4(sc, BGE_RX_CPU_EVENT) | (1 << 14));
}
}
}

3
sys/dev/bge/if_bgereg.h
View File

@ -1878,7 +1878,8 @@
#define BGE_MODE_CTL 0x6800
#define BGE_MISC_CFG 0x6804
#define BGE_MISC_LOCAL_CTL 0x6808
#define BGE_CPU_EVENT 0x6810
#define BGE_RX_CPU_EVENT 0x6810
#define BGE_TX_CPU_EVENT 0x6820
#define BGE_EE_ADDR 0x6838
#define BGE_EE_DATA 0x683C
#define BGE_EE_CTL 0x6840