spigen.4: Fix typos
MFC after: 3 days
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@ -57,7 +57,7 @@ device is associated with a single chip-select
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line on the bus, and all I/O performed through that instance is done
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with that chip-select line asserted.
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.Pp
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SPI data transfers are inherently bi-directional; there are not separate
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SPI data transfers are inherently bi-directional; there are no separate
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read and write operations.
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When commands and data are sent to a device, data also comes back from
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the device, although in some cases the data may not be useful (or even
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@ -117,7 +117,7 @@ Set the maximum clock speed (bus frequency in Hertz) to be used
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when communicating with this slave device.
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The setting remains in effect for subsequent transfers; it
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is not necessary to reset this before each transfer.
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The actual bus frequency may be lower due to hardware limitiations
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The actual bus frequency may be lower due to hardware limitations
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of the SPI bus controller device.
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.It Dv SPIGENIOC_GET_SPI_MODE Pq Vt uint32_t
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Get the SPI mode (clock polarity and phase) to be used
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