unbreak mutlicast hash creation for the second time.

at91_emac hardware is *not* using ether_crc32_be algorithm!
This commit is contained in:
ticso 2011-02-07 01:13:57 +00:00
parent d1e6a3c9a9
commit 4054909b91

View File

@ -433,6 +433,16 @@ ate_load_rx_buf(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
bus_dmamap_sync(sc->rx_desc_tag, sc->rx_desc_map, BUS_DMASYNC_POSTWRITE); bus_dmamap_sync(sc->rx_desc_tag, sc->rx_desc_map, BUS_DMASYNC_POSTWRITE);
} }
static uint32_t
ate_mac_hash(const uint8_t *buf)
{
uint32_t index = 0;
for (int i = 0; i < 48; i++) {
index ^= ((buf[i >> 3] >> (i & 7)) & 1) << (i % 6);
}
return (index);
}
/* /*
* Compute the multicast filter for this device. * Compute the multicast filter for this device.
*/ */
@ -462,8 +472,8 @@ ate_setmcast(struct ate_softc *sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK) if (ifma->ifma_addr->sa_family != AF_LINK)
continue; continue;
index = ether_crc32_be(LLADDR((struct sockaddr_dl *) index = ate_mac_hash(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; ifma->ifma_addr));
af[index >> 3] |= 1 << (index & 7); af[index >> 3] |= 1 << (index & 7);
} }
if_maddr_runlock(ifp); if_maddr_runlock(ifp);