Use ATTR_DBM even when hardware dirty bit management is not enabled.
The ARMv8 reference manual only states that the bit is reserved in this case; following Linux's example, use it instead of a software-defined bit for the purpose of indicating that a managed mapping is writable. Reviewed by: alc, andrew MFC after: r350004 Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D21121
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@ -221,8 +221,11 @@ __FBSDID("$FreeBSD$");
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* The presence of this flag indicates that the mapping is writeable.
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* If the ATTR_AP_RO bit is also set, then the mapping is clean, otherwise it is
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* dirty. This flag may only be set on managed mappings.
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*
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* The DBM bit is reserved on ARMv8.0 but it seems we can safely treat it
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* as a software managed bit.
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*/
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static pt_entry_t ATTR_SW_DBM;
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#define ATTR_SW_DBM ATTR_DBM
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struct pmap kernel_pmap_store;
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@ -784,15 +787,6 @@ pmap_bootstrap(vm_offset_t l0pt, vm_offset_t l1pt, vm_paddr_t kernstart,
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uint64_t kern_delta;
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int i;
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#ifdef notyet
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/* Determine whether the hardware implements DBM management. */
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uint64_t reg = READ_SPECIALREG(ID_AA64MMFR1_EL1);
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ATTR_SW_DBM = ID_AA64MMFR1_HAFDBS(reg) == ID_AA64MMFR1_HAFDBS_AF_DBS ?
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ATTR_DBM : _ATTR_SW_DBM;
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#else
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ATTR_SW_DBM = _ATTR_SW_DBM;
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#endif
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kern_delta = KERNBASE - kernstart;
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printf("pmap_bootstrap %lx %lx %lx\n", l1pt, kernstart, kernlen);
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@ -43,8 +43,8 @@ typedef uint64_t pt_entry_t; /* page table entry */
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#define ATTR_MASK_L UINT64_C(0x0000000000000fff)
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#define ATTR_MASK (ATTR_MASK_H | ATTR_MASK_L)
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/* Bits 58:55 are reserved for software */
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#define ATTR_SW_UNUSED (1UL << 58)
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#define _ATTR_SW_DBM (1UL << 57)
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#define ATTR_SW_UNUSED2 (1UL << 58)
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#define ATTR_SW_UNUSED1 (1UL << 57)
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#define ATTR_SW_MANAGED (1UL << 56)
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#define ATTR_SW_WIRED (1UL << 55)
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#define ATTR_UXN (1UL << 54)
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