Remove some write only global values from the arm cpufunc code.
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@ -268,11 +268,6 @@ u_int cpu_reset_needs_v4_MMU_disable; /* flag used in locore-v4.s */
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defined(CPU_MV_PJ4B) || \
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defined(CPU_CORTEXA) || defined(CPU_KRAIT)
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/* Global cache line sizes, use 32 as default */
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int arm_dcache_min_line_size = 32;
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int arm_icache_min_line_size = 32;
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int arm_idcache_min_line_size = 32;
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static void get_cachetype_cp15(void);
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/* Additional cache information local to this file. Log2 of some of the
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@ -304,12 +299,6 @@ get_cachetype_cp15(void)
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goto out;
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if (CPU_CT_FORMAT(ctype) == CPU_CT_ARMV7) {
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/* Resolve minimal cache line sizes */
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arm_dcache_min_line_size = 1 << (CPU_CT_DMINLINE(ctype) + 2);
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arm_icache_min_line_size = 1 << (CPU_CT_IMINLINE(ctype) + 2);
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arm_idcache_min_line_size =
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min(arm_icache_min_line_size, arm_dcache_min_line_size);
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__asm __volatile("mrc p15, 1, %0, c0, c0, 1"
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: "=r" (clevel));
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arm_cache_level = clevel;
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