Reimplement doorbell register emulation for NTB_SB01BASE_LOCKUP.
This allows at least first three doorbells to work very close to normal hardware, properly signaling events to upper layers without spurious or lost events. Doorbells above the first three may still report spurious events due to lack of reliable information, but they are rarely used.
This commit is contained in:
mav
parent
b2ef28faa5
commit
4353c90d6c
@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/interrupt.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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@ -253,6 +254,7 @@ struct ntb_softc {
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uint64_t db_valid_mask;
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uint64_t db_link_mask;
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uint64_t db_mask;
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uint64_t fake_db_bell; /* NTB_SB01BASE_LOCKUP*/
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int last_ts; /* ticks @ last irq */
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@ -357,7 +359,6 @@ static void xeon_set_pbar_xlat(struct ntb_softc *, uint64_t base_addr,
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enum ntb_bar idx);
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static int xeon_setup_b2b_mw(struct ntb_softc *,
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const struct ntb_b2b_addr *addr, const struct ntb_b2b_addr *peer_addr);
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static int xeon_setup_msix_bar(struct ntb_softc *);
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static inline bool link_is_up(struct ntb_softc *ntb);
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static inline bool _xeon_link_is_up(struct ntb_softc *ntb);
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static inline bool atom_link_is_err(struct ntb_softc *ntb);
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@ -1193,12 +1194,10 @@ ntb_db_set_mask(device_t dev, uint64_t bits)
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{
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struct ntb_softc *ntb = device_get_softc(dev);
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if (HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP))
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return;
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DB_MASK_LOCK(ntb);
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ntb->db_mask |= bits;
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db_iowrite(ntb, ntb->self_reg->db_mask, ntb->db_mask);
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if (!HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP))
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db_iowrite(ntb, ntb->self_reg->db_mask, ntb->db_mask);
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DB_MASK_UNLOCK(ntb);
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}
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@ -1206,18 +1205,26 @@ static void
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ntb_db_clear_mask(device_t dev, uint64_t bits)
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{
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struct ntb_softc *ntb = device_get_softc(dev);
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uint64_t ibits;
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int i;
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KASSERT((bits & ~ntb->db_valid_mask) == 0,
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("%s: Invalid bits 0x%jx (valid: 0x%jx)", __func__,
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(uintmax_t)(bits & ~ntb->db_valid_mask),
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(uintmax_t)ntb->db_valid_mask));
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if (HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP))
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return;
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DB_MASK_LOCK(ntb);
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ibits = ntb->fake_db_bell & ntb->db_mask & bits;
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ntb->db_mask &= ~bits;
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db_iowrite(ntb, ntb->self_reg->db_mask, ntb->db_mask);
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if (HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP)) {
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/* Simulate fake interrupts if unmasked DB bits are set. */
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for (i = 0; i < XEON_NONLINK_DB_MSIX_BITS; i++) {
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if ((ibits & ntb_db_vector_mask(dev, i)) != 0)
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swi_sched(ntb->int_info[i].tag, 0);
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}
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} else {
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db_iowrite(ntb, ntb->self_reg->db_mask, ntb->db_mask);
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}
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DB_MASK_UNLOCK(ntb);
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}
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@ -1226,17 +1233,8 @@ ntb_db_read(device_t dev)
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{
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struct ntb_softc *ntb = device_get_softc(dev);
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if (HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP)) {
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uint64_t res;
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unsigned i;
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res = 0;
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for (i = 0; i < XEON_NONLINK_DB_MSIX_BITS; i++) {
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if (ntb->msix_vec[i].masked != 0)
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res |= ntb_db_vector_mask(dev, i);
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}
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return (res);
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}
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if (HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP))
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return (ntb->fake_db_bell);
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return (db_ioread(ntb, ntb->self_reg->db_bell));
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}
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@ -1252,21 +1250,9 @@ ntb_db_clear(device_t dev, uint64_t bits)
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(uintmax_t)ntb->db_valid_mask));
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if (HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP)) {
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unsigned i;
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for (i = 0; i < XEON_NONLINK_DB_MSIX_BITS; i++) {
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if ((bits & ntb_db_vector_mask(dev, i)) != 0) {
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DB_MASK_LOCK(ntb);
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if (ntb->msix_vec[i].masked != 0) {
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/* XXX These need a public API. */
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#if 0
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pci_unmask_msix(ntb->device, i);
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#endif
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ntb->msix_vec[i].masked = 0;
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}
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DB_MASK_UNLOCK(ntb);
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}
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}
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DB_MASK_LOCK(ntb);
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ntb->fake_db_bell &= ~bits;
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DB_MASK_UNLOCK(ntb);
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return;
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}
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@ -1278,6 +1264,19 @@ ntb_vec_mask(struct ntb_softc *ntb, uint64_t db_vector)
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{
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uint64_t shift, mask;
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if (HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP)) {
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/*
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* Remap vectors in custom way to make at least first
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* three doorbells to not generate stray events.
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* This breaks Linux compatibility (if one existed)
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* when more then one DB is used (not by if_ntb).
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*/
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if (db_vector < XEON_NONLINK_DB_MSIX_BITS - 1)
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return (1 << db_vector);
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if (db_vector == XEON_NONLINK_DB_MSIX_BITS - 1)
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return (0x7ffc);
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}
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shift = ntb->db_vec_shift;
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mask = (1ull << shift) - 1;
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return (mask << (shift * db_vector));
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@ -1299,13 +1298,16 @@ ntb_interrupt(struct ntb_softc *ntb, uint32_t vec)
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if (HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP) &&
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(vec_mask & ntb->db_link_mask) == 0) {
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DB_MASK_LOCK(ntb);
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if (ntb->msix_vec[vec].masked == 0) {
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/* XXX These need a public API. */
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#if 0
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pci_mask_msix(ntb->device, vec);
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#endif
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ntb->msix_vec[vec].masked = 1;
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}
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/* Do not report same DB events again if not cleared yet. */
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vec_mask &= ~ntb->fake_db_bell;
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/* Update our internal doorbell register. */
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ntb->fake_db_bell |= vec_mask;
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/* Do not report masked DB events. */
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vec_mask &= ~ntb->db_mask;
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DB_MASK_UNLOCK(ntb);
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}
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@ -1508,6 +1510,7 @@ ntb_xeon_init_dev(struct ntb_softc *ntb)
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ntb->xlat_reg = &xeon_sec_xlat;
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if (HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP)) {
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ntb->fake_db_bell = 0;
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ntb->msix_mw_idx = (ntb->mw_count + g_ntb_msix_idx) %
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ntb->mw_count;
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ntb_printf(2, "Setting up MSIX mw idx %d means %u\n",
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@ -1564,10 +1567,6 @@ ntb_xeon_init_dev(struct ntb_softc *ntb)
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db_iowrite(ntb, ntb->self_reg->db_mask, ntb->db_mask);
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DB_MASK_UNLOCK(ntb);
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rc = xeon_setup_msix_bar(ntb);
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if (rc != 0)
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return (rc);
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rc = ntb_init_isr(ntb);
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return (rc);
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}
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@ -1729,19 +1728,6 @@ xeon_set_pbar_xlat(struct ntb_softc *ntb, uint64_t base_addr, enum ntb_bar idx)
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(void)base_addr;
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}
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static int
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xeon_setup_msix_bar(struct ntb_softc *ntb)
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{
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enum ntb_bar bar_num;
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if (!HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP))
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return (0);
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bar_num = ntb_mw_to_bar(ntb, ntb->msix_mw_idx);
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ntb->peer_lapic_bar = &ntb->bar_info[bar_num];
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return (0);
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}
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static int
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xeon_setup_b2b_mw(struct ntb_softc *ntb, const struct ntb_b2b_addr *addr,
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const struct ntb_b2b_addr *peer_addr)
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@ -1822,8 +1808,10 @@ xeon_setup_b2b_mw(struct ntb_softc *ntb, const struct ntb_b2b_addr *addr,
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if (HAS_FEATURE(ntb, NTB_SB01BASE_LOCKUP)) {
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size_t size, xlatoffset;
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enum ntb_bar bar_num;
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switch (ntb_mw_to_bar(ntb, ntb->msix_mw_idx)) {
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bar_num = ntb_mw_to_bar(ntb, ntb->msix_mw_idx);
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switch (bar_num) {
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case NTB_B2B_BAR_1:
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size = 8;
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xlatoffset = XEON_SBAR2XLAT_OFFSET;
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@ -1856,6 +1844,8 @@ xeon_setup_b2b_mw(struct ntb_softc *ntb, const struct ntb_b2b_addr *addr,
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ntb_reg_write(8, xlatoffset, MSI_INTEL_ADDR_BASE);
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ntb->msix_xlat = ntb_reg_read(8, xlatoffset);
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}
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ntb->peer_lapic_bar = &ntb->bar_info[bar_num];
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}
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(void)ntb_reg_read(8, XEON_SBAR2XLAT_OFFSET);
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(void)ntb_reg_read(8, XEON_SBAR4XLAT_OFFSET);
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@ -1215,7 +1215,6 @@ ntb_qp_link_work(void *arg)
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qp->event_handler(qp->cb_data, NTB_LINK_UP);
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NTB_DB_CLEAR_MASK(ntb, 1ull << qp->qp_num);
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taskqueue_enqueue(qp->rxc_tq, &qp->rxc_db_work);
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} else if (nt->link_is_up)
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callout_reset(&qp->link_work,
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NTB_LINK_DOWN_TIMEOUT * hz / 1000, ntb_qp_link_work, qp);
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