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powerpc/moea: Fix moea64 native VA invalidation

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Summary:
moea64_insert_pteg_native()'s invalidation only works by happenstance.
The purpose of the shifts and XORs is to extract the VSID in order to
reverse-engineer the lower bits of the VPN.  Currently a segment size is 256MB
(2**28), and ADDR_API_SHFT64 is 16, so ADDR_PIDX_SHIFT is equivalent.  However,
it's semantically incorrect, in that we don't want to shift by the page shift
size, we want to shift to get to the VSID.

Tested by:	bdragon
Differential Revision: https://reviews.freebsd.org/D20467
This commit is contained in:
Justin Hibbits 2019-06-01 01:40:14 +00:00
parent 5ca5dfe938
commit 4420fc895f
1 changed files with 3 additions and 6 deletions
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9
sys/powerpc/aim/moea64_native.c
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@ -646,15 +646,12 @@ moea64_insert_to_pteg_native(struct lpte *pvo_pt, uintptr_t slotbase,
* "Modifying a Page Table Entry". Need to reconstruct
* the virtual address for the outgoing entry to do that.
*/
if (oldptehi & LPTE_BIG)
va = oldptehi >> moea64_large_page_shift;
else
va = oldptehi >> ADDR_PIDX_SHFT;
va = oldptehi >> (ADDR_SR_SHFT - ADDR_API_SHFT64);
if (oldptehi & LPTE_HID)
va = (((k >> 3) ^ moea64_pteg_mask) ^ va) &
VSID_HASH_MASK;
(ADDR_PIDX >> ADDR_PIDX_SHFT);
else
va = ((k >> 3) ^ va) & VSID_HASH_MASK;
va = ((k >> 3) ^ va) & (ADDR_PIDX >> ADDR_PIDX_SHFT);
va |= (oldptehi & LPTE_AVPN_MASK) <<
(ADDR_API_SHFT64 - ADDR_PIDX_SHFT);
PTESYNC();