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Backout r193289. r193289 restored page select bits to previous

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value instead of blindly resetting it to 0. However, it seems page
select bits of some 88E1116 PHY is initialized to invalid one such
that restoring page select bits after programming broke MII
register access. The correct solution would be reset page select
bits to 0 in PHY attach stage but it would require more testing.
Since we're in BETA stage such a change would be dangerous so just
back it out.
This change should fix nfe(4) breakage on NVIDIA MCP55.

Reported by:	Ryan Rogers < webmaster <> doghouserepair dot com >
		Sam Fourman Jr. < sfourman <> gmail dot com >
Tested by:	Ryan Rogers < webmaster <> doghouserepair dot com >
		Sam Fourman Jr. < sfourman <> gmail dot com >
Approved by:	re (kib)
This commit is contained in:
Pyun YongHyeon 2009-08-18 20:20:15 +00:00
parent 627dfd6df9
commit 44d9075392
1 changed files with 1 additions and 3 deletions
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4
sys/dev/mii/e1000phy.c
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@ -240,13 +240,11 @@ e1000phy_reset(struct mii_softc *sc)
if (esc->mii_model == MII_MODEL_MARVELL_E1116 ||
esc->mii_model == MII_MODEL_MARVELL_E1149) {
page = PHY_READ(sc, E1000_EADR);
/* Select page 2, MAC specific control register. */
PHY_WRITE(sc, E1000_EADR, 2);
reg = PHY_READ(sc, E1000_SCR);
reg |= E1000_SCR_RGMII_POWER_UP;
PHY_WRITE(sc, E1000_SCR, reg);
PHY_WRITE(sc, E1000_EADR, page);
PHY_WRITE(sc, E1000_EADR, 0);
}
}