From 45e1aff18aee5347c8ed1e67229380dd7e2d4e3d Mon Sep 17 00:00:00 2001 From: Alexander Motin Date: Mon, 21 Dec 2009 21:27:56 +0000 Subject: [PATCH] Clear all ports interrupt status bits in single write. Clearing one by one causes additional MSIs messages sent if several ports asked for attention same time. Time window before clearing is not important, as these interrupts are level triggered by interrupt source. --- sys/dev/ahci/ahci.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/sys/dev/ahci/ahci.c b/sys/dev/ahci/ahci.c index 84a16306e2fd..632a121cdbd9 100644 --- a/sys/dev/ahci/ahci.c +++ b/sys/dev/ahci/ahci.c @@ -596,20 +596,18 @@ ahci_intr(void *data) unit = irq->r_irq_rid - 1; is = ATA_INL(ctlr->r_mem, AHCI_IS); } + /* Some controllers have edge triggered IS. */ + if (ctlr->quirks & AHCI_Q_EDGEIS) + ATA_OUTL(ctlr->r_mem, AHCI_IS, is); for (; unit < ctlr->channels; unit++) { if ((is & (1 << unit)) != 0 && (arg = ctlr->interrupt[unit].argument)) { - if (ctlr->quirks & AHCI_Q_EDGEIS) { - /* Some controller have edge triggered IS. */ - ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); ctlr->interrupt[unit].function(arg); - } else { - /* but AHCI declares level triggered IS. */ - ctlr->interrupt[unit].function(arg); - ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit); - } } } + /* AHCI declares level triggered IS. */ + if (!(ctlr->quirks & AHCI_Q_EDGEIS)) + ATA_OUTL(ctlr->r_mem, AHCI_IS, is); } /*