Don't attempt to manage our own segment list, and just remember the buffers
provided. Obtained from: NetBSD
This commit is contained in:
Olivier Houchard
parent
f68fab42ef
commit
4637f47217
@ -79,19 +79,18 @@ struct bus_dma_tag {
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*/
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struct arm32_dma_range *ranges;
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int _nranges;
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};
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struct arm_seglist {
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bus_dma_segment_t seg;
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SLIST_ENTRY(arm_seglist) next;
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};
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#define MAX_SEGS 512
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#define DMAMAP_LINEAR 0x1
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#define DMAMAP_MBUF 0x2
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#define DMAMAP_UIO 0x4
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#define DMAMAP_TYPE_MASK (DMAMAP_LINEAR|DMAMAP_MBUF|DMAMAP_UIO)
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#define DMAMAP_COHERENT 0x8
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struct bus_dmamap {
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bus_dma_tag_t dmat;
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int flags;
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SLIST_HEAD(, arm_seglist) seglist;
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bus_dma_tag_t dmat;
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int flags;
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void *buffer;
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int len;
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};
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/*
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@ -103,6 +102,7 @@ bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t segs[],
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bus_dmamap_t map, void *buf, bus_size_t buflen, struct thread *td,
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int flags, vm_offset_t *lastaddrp, int *segp,
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int first);
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static __inline struct arm32_dma_range *
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_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
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bus_addr_t curaddr)
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@ -161,6 +161,8 @@ dflt_lock(void *arg, bus_dma_lock_op_t op)
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/*
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* Allocate a device specific dma_tag.
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*/
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#define SEG_NB 1024
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int
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bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
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bus_size_t boundary, bus_addr_t lowaddr,
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@ -171,7 +173,6 @@ bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
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{
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bus_dma_tag_t newtag;
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int error = 0;
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/* Return a NULL tag on failure */
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*dmat = NULL;
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@ -193,6 +194,7 @@ bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
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newtag->ref_count = 1; /* Count ourself */
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newtag->map_count = 0;
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newtag->ranges = bus_dma_get_range();
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newtag->_nranges = bus_dma_get_range_nb();
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if (lockfunc != NULL) {
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newtag->lockfunc = lockfunc;
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newtag->lockfuncarg = lockfuncarg;
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@ -200,7 +202,6 @@ bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
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newtag->lockfunc = dflt_lock;
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newtag->lockfuncarg = NULL;
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}
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/*
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* Take into account any restrictions imposed by our parent tag
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*/
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@ -257,34 +258,6 @@ bus_dma_tag_destroy(bus_dma_tag_t dmat)
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return (0);
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}
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static void
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arm_dmamap_freesegs(bus_dmamap_t map)
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{
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struct arm_seglist *seg = SLIST_FIRST(&map->seglist);
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while (seg) {
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struct arm_seglist *next;
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next = SLIST_NEXT(seg, next);
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SLIST_REMOVE_HEAD(&map->seglist, next);
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free(seg, M_DEVBUF);
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seg = next;
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}
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}
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static int
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arm_dmamap_addseg(bus_dmamap_t map, vm_offset_t addr, vm_size_t size)
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{
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struct arm_seglist *seg = malloc(sizeof(*seg), M_DEVBUF, M_NOWAIT);
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if (!seg)
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return (ENOMEM);
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seg->seg.ds_addr = addr;
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seg->seg.ds_len = size;
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SLIST_INSERT_HEAD(&map->seglist, seg, next);
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return (0);
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}
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/*
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* Allocate a handle for mapping from kva/uva/physical
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* address space into bus device space.
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@ -297,8 +270,9 @@ bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
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newmap = malloc(sizeof(*newmap), M_DEVBUF, M_NOWAIT | M_ZERO);
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if (newmap == NULL)
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return (ENOMEM);
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SLIST_INIT(&newmap->seglist);
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*mapp = newmap;
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newmap->dmat = dmat;
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newmap->flags = 0;
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dmat->map_count++;
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return (0);
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@ -311,7 +285,7 @@ bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
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int
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bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
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{
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arm_dmamap_freesegs(map);
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free(map, M_DEVBUF);
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dmat->map_count--;
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return (0);
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@ -326,7 +300,7 @@ int
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bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
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bus_dmamap_t *mapp)
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{
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bus_dmamap_t newmap;
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bus_dmamap_t newmap = NULL;
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int mflags;
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@ -337,11 +311,16 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
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if (flags & BUS_DMA_ZERO)
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mflags |= M_ZERO;
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newmap = malloc(sizeof(*newmap), M_DEVBUF, M_NOWAIT | M_ZERO);
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if (newmap == NULL)
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return (ENOMEM);
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SLIST_INIT(&newmap->seglist);
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*mapp = newmap;
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if (!*mapp) {
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newmap = malloc(sizeof(*newmap), M_DEVBUF, M_NOWAIT | M_ZERO);
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if (newmap == NULL)
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return (ENOMEM);
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dmat->map_count++;
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newmap->flags = 0;
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*mapp = newmap;
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newmap->dmat = dmat;
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}
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if (dmat->maxsize <= PAGE_SIZE) {
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*vaddr = malloc(dmat->maxsize, M_DEVBUF, mflags);
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} else {
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@ -354,13 +333,12 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
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0ul, dmat->lowaddr, dmat->alignment? dmat->alignment : 1ul,
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dmat->boundary);
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}
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if (*vaddr == NULL) {
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if (*vaddr == NULL && newmap != NULL) {
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free(newmap, M_DEVBUF);
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dmat->map_count--;
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*mapp = NULL;
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return (ENOMEM);
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}
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return (0);
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}
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@ -371,14 +349,12 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
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void
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bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
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{
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if (map != NULL)
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panic("bus_dmamem_free: Invalid map freed\n");
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if (dmat->maxsize <= PAGE_SIZE)
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free(vaddr, M_DEVBUF);
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else {
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contigfree(vaddr, dmat->maxsize, M_DEVBUF);
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}
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arm_dmamap_freesegs(map);
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dmat->map_count--;
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free(map, M_DEVBUF);
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}
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@ -398,10 +374,17 @@ bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
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bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
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#endif
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map->flags &= ~DMAMAP_TYPE_MASK;
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map->flags |= DMAMAP_LINEAR|DMAMAP_COHERENT;
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map->buffer = buf;
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map->len = buflen;
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error = bus_dmamap_load_buffer(dmat,
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dm_segments, map, buf, buflen, NULL,
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flags, &lastaddr, &nsegs, 1);
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(*callback)(callback_arg, dm_segments, nsegs, error);
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if (error)
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(*callback)(callback_arg, NULL, 0, error);
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else
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(*callback)(callback_arg, dm_segments, nsegs + 1, error);
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return (0);
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}
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@ -428,7 +411,6 @@ bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t segs[],
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pt_entry_t pte;
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pt_entry_t *ptep;
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if (td != NULL)
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pmap = vmspace_pmap(td->td_proc->p_vmspace);
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else
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@ -451,7 +433,7 @@ bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t segs[],
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(vaddr & L1_S_OFFSET);
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if (*pde & L1_S_CACHE_MASK) {
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map->flags &=
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~ARM32_DMAMAP_COHERENT;
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~DMAMAP_COHERENT;
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}
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} else {
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pte = *ptep;
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@ -463,22 +445,37 @@ bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t segs[],
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(vaddr & L2_L_OFFSET);
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if (pte & L2_L_CACHE_MASK) {
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map->flags &=
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~ARM32_DMAMAP_COHERENT;
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~DMAMAP_COHERENT;
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}
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} else {
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curaddr = (pte & L2_S_FRAME) |
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(vaddr & L2_S_OFFSET);
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if (pte & L2_S_CACHE_MASK) {
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map->flags &=
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~ARM32_DMAMAP_COHERENT;
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~DMAMAP_COHERENT;
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}
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}
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}
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} else {
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curaddr = pmap_extract(pmap, vaddr);
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map->flags &= ~ARM32_DMAMAP_COHERENT;
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map->flags &= ~DMAMAP_COHERENT;
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}
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if (dmat->ranges) {
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struct arm32_dma_range *dr;
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dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges,
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curaddr);
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if (dr == NULL)
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return (EINVAL);
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/*
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* In a valid DMA range. Translate the physical
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* memory address to an address in the DMA window.
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*/
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curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
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}
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/*
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* Compute the segment size, and adjust counts.
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*/
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@ -499,11 +496,6 @@ bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t segs[],
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* Insert chunk into a segment, coalescing with
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* the previous segment if possible.
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*/
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error = arm_dmamap_addseg(map,
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(vm_offset_t)curaddr, sgsize);
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if (error)
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break;
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if (first) {
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segs[seg].ds_addr = curaddr;
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segs[seg].ds_len = sgsize;
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@ -512,8 +504,11 @@ bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t segs[],
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if (curaddr == lastaddr &&
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(segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
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(dmat->boundary == 0 ||
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(segs[seg].ds_addr & bmask) == (curaddr & bmask)))
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(segs[seg].ds_addr & bmask) ==
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(curaddr & bmask))) {
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segs[seg].ds_len += sgsize;
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goto segdone;
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}
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else {
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if (++seg >= dmat->nsegments)
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break;
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@ -522,6 +517,9 @@ bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t segs[],
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}
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}
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if (error)
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break;
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segdone:
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lastaddr = curaddr + sgsize;
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vaddr += sgsize;
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buflen -= sgsize;
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@ -555,6 +553,9 @@ bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map, struct mbuf *m0,
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M_ASSERTPKTHDR(m0);
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map->flags &= ~DMAMAP_TYPE_MASK;
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map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT;
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map->buffer = m0;
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if (m0->m_pkthdr.len <= dmat->maxsize) {
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int first = 1;
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vm_offset_t lastaddr = 0;
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@ -578,7 +579,7 @@ bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map, struct mbuf *m0,
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*/
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(*callback)(callback_arg, dm_segments, 0, 0, error);
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} else {
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(*callback)(callback_arg, dm_segments, nsegs+1,
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(*callback)(callback_arg, dm_segments, nsegs + 1,
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m0->m_pkthdr.len, error);
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}
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return (error);
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@ -605,6 +606,9 @@ bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map, struct uio *uio,
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resid = uio->uio_resid;
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iov = uio->uio_iov;
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map->flags &= ~DMAMAP_TYPE_MASK;
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map->flags |= DMAMAP_UIO|DMAMAP_COHERENT;
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map->buffer = uio;
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if (uio->uio_segflg == UIO_USERSPACE) {
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td = uio->uio_td;
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@ -647,30 +651,73 @@ bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map, struct uio *uio,
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}
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/*
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* Release the mapping held by map. A no-op on PowerPC.
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* Release the mapping held by map.
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*/
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void
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bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
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{
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arm_dmamap_freesegs(map);
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map->flags &= ~DMAMAP_TYPE_MASK;
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return;
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}
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static void
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bus_dmamap_sync_buf(void *buf, int len, bus_dmasync_op_t op)
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{
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if (op & BUS_DMASYNC_POSTREAD ||
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op == (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) {
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cpu_dcache_wbinv_range((vm_offset_t)buf, len);
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return;
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}
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if (op & BUS_DMASYNC_PREWRITE)
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cpu_dcache_wb_range((vm_offset_t)buf, len);
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if (op & BUS_DMASYNC_PREREAD) {
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if ((((vm_offset_t)buf | len) & arm_dcache_align_mask) == 0)
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cpu_dcache_inv_range((vm_offset_t)buf, len);
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else
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cpu_dcache_wbinv_range((vm_offset_t)buf, len);
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}
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}
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void
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bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
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{
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struct arm_seglist *seg = SLIST_FIRST(&map->seglist);
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if (op != BUS_DMASYNC_PREREAD && op != BUS_DMASYNC_PREWRITE)
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struct mbuf *m;
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struct uio *uio;
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int resid;
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struct iovec *iov;
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if (op == BUS_DMASYNC_POSTREAD)
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return;
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/* Skip cache frobbing if mapping was COHERENT. */
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if (map->flags & ARM32_DMAMAP_COHERENT) {
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/* Drain the write buffer. */
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cpu_drain_writebuf();
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if (map->flags & DMAMAP_COHERENT)
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return;
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switch(map->flags & DMAMAP_TYPE_MASK) {
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case DMAMAP_LINEAR:
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bus_dmamap_sync_buf(map->buffer, map->len, op);
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break;
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case DMAMAP_MBUF:
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m = map->buffer;
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while (m) {
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bus_dmamap_sync_buf(m->m_data, m->m_len, op);
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m = m->m_next;
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}
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break;
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case DMAMAP_UIO:
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uio = map->buffer;
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iov = uio->uio_iov;
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resid = uio->uio_resid;
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for (int i = 0; i < uio->uio_iovcnt && resid != 0; i++) {
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bus_size_t minlen = resid < iov[i].iov_len ? resid :
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iov[i].iov_len;
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if (minlen > 0) {
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bus_dmamap_sync_buf(iov[i].iov_base, minlen,
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op);
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resid -= minlen;
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}
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}
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break;
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default:
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break;
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}
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while (seg) {
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cpu_dcache_wbinv_range(seg->seg.ds_addr, seg->seg.ds_len);
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seg = SLIST_NEXT(seg, next);
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}
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cpu_drain_writebuf();
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}
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