Fix comments to match last commit, and minor reformatting...
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0a1dc51947
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@ -1901,14 +1901,14 @@ pci_cfg_save(device_t dev, struct pci_devinfo *dinfo, int setstate)
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dinfo->cfg.bios = pci_read_config(dev, PCIR_BIOS, 4);
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/*
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* Some drivers apparently write to these registers w/o
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* updating our cahced copy. No harm happens if we update the
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* copy, so do so here so we can restore them. The COMMAND
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* register is modified by the bus w/o updating the cache. This
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* should represent the normally writable portion of the 'defined'
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* part of type 0 headers. In theory we also need to save/restore
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* the PCI capability structures we know about, but apart from power
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* we don't know any that are writable.
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* Some drivers apparently write to these registers w/o updating our
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* cahced copy. No harm happens if we update the copy, so do so here
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* so we can restore them. The COMMAND register is modified by the
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* bus w/o updating the cache. This should represent the normally
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* writable portion of the 'defined' part of type 0 headers. In
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* theory we also need to save/restore the PCI capability structures
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* we know about, but apart from power we don't know any that are
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* writable.
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*/
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dinfo->cfg.subvendor = pci_read_config(dev, PCIR_SUBVEND_0, 2);
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dinfo->cfg.subdevice = pci_read_config(dev, PCIR_SUBDEV_0, 2);
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@ -1927,19 +1927,19 @@ pci_cfg_save(device_t dev, struct pci_devinfo *dinfo, int setstate)
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dinfo->cfg.revid = pci_read_config(dev, PCIR_REVID, 1);
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/*
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* don't set the state for display devices and for memory devices
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* since bad things happen. we should (a) have drivers that can easily
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* detach and (b) use generic drivers for these devices so that some
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* device actually attaches. We need to make sure that when we
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* implement (a) we don't power the device down on a reattach.
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* don't set the state for display devices, base peripherals and
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* memory devices since bad things happen when they are powered down.
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* We should (a) have drivers that can easily detach and (b) use
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* generic drivers for these devices so that some device actually
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* attaches. We need to make sure that when we implement (a) we don't
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* power the device down on a reattach.
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*/
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cls = pci_get_class(dev);
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if (setstate && cls != PCIC_DISPLAY && cls != PCIC_MEMORY &&
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cls != PCIC_BASEPERIPH) {
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/*
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* PCI spec is clear that we can only go into D3 state from
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* D0 state. Transition from D[12] into D0 before going
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* to D3 state.
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* PCI spec says we can only go into D3 state from D0 state.
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* Transition from D[12] into D0 before going to D3 state.
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*/
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ps = pci_get_powerstate(dev);
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if (ps != PCI_POWERSTATE_D0 && ps != PCI_POWERSTATE_D3) {
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