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PowerNV: send MSI_EOI always after MSI unmask

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MSI/MSI-x interrupts are edge-triggered. If an interrupt
arrives when IRQ line is masked, it will be lost and will
never recover. Perform MSI_EOI always after unmask to give
a chance for PHB/XICS to send an interrupt again if MSI/MSI-x
pending bit is set in MSI/MSI-x BAR space.

Submitted by:          Wojciech Macek <wma@semihalf.org>
Obtained from:         Semihalf
Sponsored by:          IBM, QCM Technologies
This commit is contained in:
wma 2018-01-23 08:07:00 +00:00
parent 89605f7eb2
commit 46822a0e45
1 changed files with 6 additions and 0 deletions
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6
sys/powerpc/powernv/opal_pci.c
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@ -601,7 +601,13 @@ static void opalpic_pic_mask(device_t dev, u_int irq)
static void opalpic_pic_unmask(device_t dev, u_int irq)
{
struct opalpci_softc *sc;
sc = device_get_softc(dev);
PIC_UNMASK(root_pic, irq);
opal_call(OPAL_PCI_MSI_EOI, sc->phb_id, irq);
}