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MFi386: r1.17: Treat pin 0 as IRQ 0 rather than ExtINT if mixed mode is not

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enabled by the enumerator.
This commit is contained in:
John Baldwin 2005-02-22 22:17:03 +00:00
parent d118c9a5fb
commit 470273d7d9
1 changed files with 3 additions and 2 deletions
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5
sys/amd64/amd64/io_apic.c
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@ -548,10 +548,11 @@ ioapic_create(uintptr_t addr, int32_t apic_id, int intbase)
/*
* Assume that pin 0 on the first I/O APIC is an ExtINT pin
* and that pins 1-15 are ISA interrupts. Assume that all
* if mixed mode is enabled and an ISA interrupt if not.
* Assume that pins 1-15 are ISA interrupts and that all
* other pins are PCI interrupts.
*/
if (intpin->io_vector == 0)
if (intpin->io_vector == 0 && mixed_mode_enabled)
ioapic_set_extint(io, i);
else if (intpin->io_vector < IOAPIC_ISA_INTS) {
intpin->io_bus = APIC_BUS_ISA;