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Fix a typo derived from a mismerge from mmu_oea that would cause

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pmap_sync_icache() to sync random (possibly uncached or nonexisting!)
memory, causing kernel page faults or machine checks, most easily
triggered by using GDB. While here, add an additional safeguard to only
sync cacheable memory.

MFC after:	2 days
This commit is contained in:
Nathan Whitehorn 2011-06-04 03:22:16 +00:00
parent c5c142f652
commit 4770f5380e
1 changed files with 2 additions and 2 deletions
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4
sys/powerpc/aim/mmu_oea64.c
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@ -2562,8 +2562,8 @@ moea64_sync_icache(mmu_t mmu, pmap_t pm, vm_offset_t va, vm_size_t sz)
lim = round_page(va);
len = MIN(lim - va, sz);
pvo = moea64_pvo_find_va(pm, va & ~ADDR_POFF);
if (pvo != NULL) {
pa = (pvo->pvo_pte.pte.pte_lo & LPTE_RPGN) |
if (pvo != NULL && !(pvo->pvo_pte.lpte.pte_lo & LPTE_I)) {
pa = (pvo->pvo_pte.lpte.pte_lo & LPTE_RPGN) |
(va & ADDR_POFF);
moea64_syncicache(mmu, pm, va, pa, len);
}