Add configuration files for BERI soft-core synthesized on
Terasic SoCKit board (Altera FPGA). Use virtio block as root filesystem device. Sponsored by: DARPA, AFRL
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219
sys/boot/fdt/dts/mips/beripad-sockit.dts
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219
sys/boot/fdt/dts/mips/beripad-sockit.dts
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/*-
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* Copyright (c) 2012-2013 Robert N. M. Watson
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* Copyright (c) 2013-2014 SRI International
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* Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/dts-v1/;
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/*
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* Device names here have been largely made up on the spot, especially for the
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* "compatible" strings, and might want to be revised.
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*/
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/ {
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model = "SRI/Cambridge BeriPad (SoCKit)";
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compatible = "sri-cambridge,beripad-sockit";
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <1>;
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/*
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* Secondary CPUs all start disabled and use the
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* spin-table enable method. cpu-release-addr must be
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* specified for each cpu other than cpu@0. Values of
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* cpu-release-addr grow down from 0x100000 (kernel).
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*/
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status = "disabled";
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enable-method = "spin-table";
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cpu@0 {
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device-type = "cpu";
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compatible = "sri-cambridge,beri";
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reg = <0 1>;
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status = "okay";
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};
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/*
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cpu@1 {
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device-type = "cpu";
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compatible = "sri-cambridge,beri";
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reg = <1 1>;
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// XXX: should we need cached prefix?
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cpu-release-addr = <0xffffffff 0x800fffe0>;
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};
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*/
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x10000000>; /* 256MB at 0x0 */
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};
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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/*
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* Declare mips,mips4k since BERI doesn't (yet) have a PIC, so
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* we use mips4k coprocessor 0 interrupt management directly.
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*/
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compatible = "simple-bus", "mips,mips4k";
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/* ranges = <>; */
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beripic0: beripic@7f804000 {
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compatible = "sri-cambridge,beri-pic";
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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reg = <0x0 0x7f804000 0x0 0x400
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0x0 0x7f806000 0x0 0x10
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0x0 0x7f806080 0x0 0x10
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0x0 0x7f806100 0x0 0x10>;
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interrupts = <0 1 2 3 4>;
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hard-interrupt-sources = <64>;
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soft-interrupt-sources = <64>;
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};
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pio0: pio@7f020000 {
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compatible = "altr,pio";
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reg = <0x0 0x7f020000 0x0 0x1000>; /* send */
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interrupts = <4>; /* not used */
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interrupt-parent = <&beripic0>;
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};
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pio1: pio@7f021000 {
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compatible = "altr,pio";
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reg = <0x0 0x7f021000 0x0 0x1000>; /* recv */
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interrupts = <10>;
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interrupt-parent = <&beripic0>;
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};
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pio2: pio@7f022000 {
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compatible = "altr,pio";
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reg = <0x0 0x7f022000 0x0 0x1000>; /* send */
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interrupts = <5>; /* not used */
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interrupt-parent = <&beripic0>;
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};
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pio3: pio@7f023000 {
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compatible = "altr,pio";
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reg = <0x0 0x7f023000 0x0 0x1000>; /* recv */
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interrupts = <11>;
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interrupt-parent = <&beripic0>;
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};
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virtio_mmio_platform0: virtio_mmio_platform@0 {
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compatible = "beri,virtio_mmio_platform";
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pio-send = <&pio0>;
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pio-recv = <&pio1>;
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};
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virtio_mmio_platform1: virtio_mmio_platform@1 {
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compatible = "beri,virtio_mmio_platform";
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pio-send = <&pio2>;
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pio-recv = <&pio3>;
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};
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virtio_block@200001000 {
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compatible = "virtio,mmio";
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reg = <0x2 0x1000 0x0 0x1000>;
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platform = <&virtio_mmio_platform0>;
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status = "okay";
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};
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virtio_net@200002000 {
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compatible = "virtio,mmio";
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reg = <0x2 0x2000 0x0 0x1000>;
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platform = <&virtio_mmio_platform1>;
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status = "okay";
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};
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serial@7f000000 {
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compatible = "altera,jtag_uart-11_0";
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reg = <0x0 0x7f000000 0x0 0x40>;
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interrupts = <0>;
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interrupt-parent = <&beripic0>;
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};
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/*
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serial@7f001000 {
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compatible = "altera,jtag_uart-11_0";
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reg = <0x7f001000 0x40>;
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};
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serial@7f002000 {
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compatible = "altera,jtag_uart-11_0";
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reg = <0x7f002000 0x40>;
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};
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*/
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/*
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led@7f006000 {
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compatible = "sri-cambridge,de4led";
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reg = <0x7f006000 0x1>;
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};
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*/
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/*
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avgen@0x7f009000 {
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compatible = "sri-cambridge,avgen";
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reg = <0x7f009000 0x2>;
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sri-cambridge,width = <1>;
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sri-cambridge,fileio = "r";
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sri-cambridge,devname = "de4bsw";
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};
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*/
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/*
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berirom@0x7f00a000 {
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compatible = "sri-cambridge,berirom";
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reg = <0x7f00a000 0x1000>;
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};
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*/
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/*
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avgen@0x7f00c000 {
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compatible = "sri-cambridge,avgen";
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reg = <0x7f00c000 0x8>;
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sri-cambridge,width = <4>;
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sri-cambridge,fileio = "rw";
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sri-cambridge,devname = "de4tempfan";
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};
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*/
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};
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};
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@ -6,6 +6,7 @@ dev/altera/jtag_uart/altera_jtag_uart_cons.c optional altera_jtag_uart
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dev/altera/jtag_uart/altera_jtag_uart_tty.c optional altera_jtag_uart
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dev/altera/jtag_uart/altera_jtag_uart_fdt.c optional altera_jtag_uart fdt
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dev/altera/jtag_uart/altera_jtag_uart_nexus.c optional altera_jtag_uart
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dev/beri/virtio/virtio_mmio_platform.c optional virtio_mmio
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dev/netfpga10g/nf10bmac/if_nf10bmac_fdt.c optional netfpga10g_nf10bmac fdt
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dev/netfpga10g/nf10bmac/if_nf10bmac.c optional netfpga10g_nf10bmac
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dev/terasic/de4led/terasic_de4led.c optional terasic_de4led
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26
sys/mips/conf/BERI_SOCKIT
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26
sys/mips/conf/BERI_SOCKIT
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#
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# BERI_SOCKIT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible
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# RISC Implementation) FPGA soft core, as configured in its Terasic SoCKit
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# reference configuration. This kernel configration must be further
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# specialized to to include a root filesystem specification.
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#
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# $FreeBSD$
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#
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include "BERI_TEMPLATE"
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ident BERI_SOCKIT
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options ROOTDEVNAME=\"ufs:vtbd0\"
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device altera_pio
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device altera_jtag_uart
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device virtio
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device virtio_blk
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device vtnet
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device virtio_mmio
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options FDT
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options FDT_DTB_STATIC
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makeoptions FDT_DTS_FILE=beripad-sockit.dts
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