Possess some work from OpenBSD, with some local additions.
- Add more device IDs, ASIC revisions and chip IDs.
- Rewrite a bit code that picks the description for device.
- Introduce several macros to shorten quirks for bugs and
features.[*]
- Use some magic values, that OpenBSD has successfully
possessed from Linux (Broadcom supplied) driver.
- Remove disabled code that tried to access VPD.
[*] The macro that matches Jumbo capable NICs is
rewritten to preserve our current behavior. I
need clarify whether our or theirs is correct.
PR: 68351 (and may be others)
Obtained from: OpenBSD, brad@ mostly
This commit is contained in:
Gleb Smirnoff
parent
254c472561
commit
4c0da0ff4f
@ -126,72 +126,195 @@ MODULE_DEPEND(bge, miibus, 1, 1, 1);
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* ID burned into it, though it will always be overriden by the vendor
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* ID in the EEPROM. Just to be safe, we cover all possibilities.
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*/
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#define BGE_DEVDESC_MAX 64 /* Maximum device description length */
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static struct bge_type {
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uint16_t bge_vid;
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uint16_t bge_did;
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} bge_devs[] = {
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{ ALTEON_VENDORID, ALTEON_DEVICEID_BCM5700 },
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{ ALTEON_VENDORID, ALTEON_DEVICEID_BCM5701 },
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static struct bge_type bge_devs[] = {
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{ ALT_VENDORID, ALT_DEVICEID_BCM5700,
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"Broadcom BCM5700 Gigabit Ethernet" },
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{ ALT_VENDORID, ALT_DEVICEID_BCM5701,
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"Broadcom BCM5701 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5700,
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"Broadcom BCM5700 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5701,
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"Broadcom BCM5701 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5702,
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"Broadcom BCM5702 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5702X,
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"Broadcom BCM5702X Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5703,
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"Broadcom BCM5703 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5703X,
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"Broadcom BCM5703X Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5704C,
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"Broadcom BCM5704C Dual Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5704S,
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"Broadcom BCM5704S Dual Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705,
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"Broadcom BCM5705 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705K,
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"Broadcom BCM5705K Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705M,
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"Broadcom BCM5705M Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705M_ALT,
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"Broadcom BCM5705M Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5714C,
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"Broadcom BCM5714C Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5721,
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"Broadcom BCM5721 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5750,
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"Broadcom BCM5750 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5750M,
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"Broadcom BCM5750M Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5751,
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"Broadcom BCM5751 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5751M,
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"Broadcom BCM5751M Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5752,
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"Broadcom BCM5752 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5782,
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"Broadcom BCM5782 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5788,
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"Broadcom BCM5788 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5789,
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"Broadcom BCM5789 Gigabit Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5901,
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"Broadcom BCM5901 Fast Ethernet" },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5901A2,
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"Broadcom BCM5901A2 Fast Ethernet" },
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{ SK_VENDORID, SK_DEVICEID_ALTIMA,
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"SysKonnect Gigabit Ethernet" },
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{ ALTIMA_VENDORID, ALTIMA_DEVICE_AC1000,
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"Altima AC1000 Gigabit Ethernet" },
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{ ALTIMA_VENDORID, ALTIMA_DEVICE_AC1002,
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"Altima AC1002 Gigabit Ethernet" },
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{ ALTIMA_VENDORID, ALTIMA_DEVICE_AC9100,
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"Altima AC9100 Gigabit Ethernet" },
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{ 0, 0, NULL }
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{ ALTIMA_VENDORID, ALTIMA_DEVICE_AC1000 },
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{ ALTIMA_VENDORID, ALTIMA_DEVICE_AC1002 },
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{ ALTIMA_VENDORID, ALTIMA_DEVICE_AC9100 },
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{ APPLE_VENDORID, APPLE_DEVICE_BCM5701 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5700 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5701 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5702 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5702_ALT },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5702X },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5703 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5703_ALT },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5703X },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5704C },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5704S },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5704S_ALT },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705F },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705K },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705M },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705M_ALT },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5714C },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5714S },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5715 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5715S },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5720 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5721 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5750 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5750M },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5751 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5751F },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5751M },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5752 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5752M },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5753 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5753F },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5753M },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5780 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5780S },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5781 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5782 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5788 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5789 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5901 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5901A2 },
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{ BCOM_VENDORID, BCOM_DEVICEID_BCM5903M },
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{ SK_VENDORID, SK_DEVICEID_ALTIMA },
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{ TC_VENDORID, TC_DEVICEID_3C985 },
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{ TC_VENDORID, TC_DEVICEID_3C996 },
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{ 0, 0 }
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};
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static const struct bge_vendor {
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uint16_t v_id;
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const char *v_name;
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} bge_vendors[] = {
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{ ALTEON_VENDORID, "Alteon" },
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{ ALTIMA_VENDORID, "Altima" },
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{ APPLE_VENDORID, "Apple" },
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{ BCOM_VENDORID, "Broadcom" },
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{ SK_VENDORID, "SysKonnect" },
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{ TC_VENDORID, "3Com" },
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{ 0, NULL }
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};
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static const struct bge_revision {
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uint32_t br_chipid;
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const char *br_name;
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} bge_revisions[] = {
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{ BGE_CHIPID_BCM5700_A0, "BCM5700 A0" },
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{ BGE_CHIPID_BCM5700_A1, "BCM5700 A1" },
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{ BGE_CHIPID_BCM5700_B0, "BCM5700 B0" },
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{ BGE_CHIPID_BCM5700_B1, "BCM5700 B1" },
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{ BGE_CHIPID_BCM5700_B2, "BCM5700 B2" },
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{ BGE_CHIPID_BCM5700_B3, "BCM5700 B3" },
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{ BGE_CHIPID_BCM5700_ALTIMA, "BCM5700 Altima" },
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{ BGE_CHIPID_BCM5700_C0, "BCM5700 C0" },
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{ BGE_CHIPID_BCM5701_A0, "BCM5701 A0" },
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{ BGE_CHIPID_BCM5701_B0, "BCM5701 B0" },
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{ BGE_CHIPID_BCM5701_B2, "BCM5701 B2" },
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{ BGE_CHIPID_BCM5701_B5, "BCM5701 B5" },
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{ BGE_CHIPID_BCM5703_A0, "BCM5703 A0" },
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{ BGE_CHIPID_BCM5703_A1, "BCM5703 A1" },
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{ BGE_CHIPID_BCM5703_A2, "BCM5703 A2" },
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{ BGE_CHIPID_BCM5703_A3, "BCM5703 A3" },
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{ BGE_CHIPID_BCM5704_A0, "BCM5704 A0" },
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{ BGE_CHIPID_BCM5704_A1, "BCM5704 A1" },
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{ BGE_CHIPID_BCM5704_A2, "BCM5704 A2" },
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{ BGE_CHIPID_BCM5704_A3, "BCM5704 A3" },
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{ BGE_CHIPID_BCM5704_B0, "BCM5704 B0" },
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{ BGE_CHIPID_BCM5705_A0, "BCM5705 A0" },
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{ BGE_CHIPID_BCM5705_A1, "BCM5705 A1" },
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{ BGE_CHIPID_BCM5705_A2, "BCM5705 A2" },
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{ BGE_CHIPID_BCM5705_A3, "BCM5705 A3" },
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{ BGE_CHIPID_BCM5750_A0, "BCM5750 A0" },
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{ BGE_CHIPID_BCM5750_A1, "BCM5750 A1" },
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{ BGE_CHIPID_BCM5750_A3, "BCM5750 A3" },
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{ BGE_CHIPID_BCM5750_B0, "BCM5750 B0" },
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{ BGE_CHIPID_BCM5750_B1, "BCM5750 B1" },
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{ BGE_CHIPID_BCM5750_C0, "BCM5750 C0" },
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{ BGE_CHIPID_BCM5750_C1, "BCM5750 C1" },
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{ BGE_CHIPID_BCM5714_A0, "BCM5714 A0" },
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{ BGE_CHIPID_BCM5752_A0, "BCM5752 A0" },
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{ BGE_CHIPID_BCM5752_A1, "BCM5752 A1" },
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{ BGE_CHIPID_BCM5752_A2, "BCM5752 A2" },
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{ BGE_CHIPID_BCM5714_B0, "BCM5714 B0" },
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{ BGE_CHIPID_BCM5714_B3, "BCM5714 B3" },
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{ BGE_CHIPID_BCM5715_A0, "BCM5715 A0" },
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{ BGE_CHIPID_BCM5715_A1, "BCM5715 A1" },
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{ 0, NULL }
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};
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/*
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* Some defaults for major revisions, so that newer steppings
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* that we don't know about have a shot at working.
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*/
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static const struct bge_revision bge_majorrevs[] = {
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{ BGE_ASICREV_BCM5700,
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"unknown BCM5700" },
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{ BGE_ASICREV_BCM5701,
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"unknown BCM5701" },
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{ BGE_ASICREV_BCM5703,
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"unknown BCM5703" },
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{ BGE_ASICREV_BCM5704,
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"unknown BCM5704" },
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{ BGE_ASICREV_BCM5705,
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"unknown BCM5705" },
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{ BGE_ASICREV_BCM5750,
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"unknown BCM5750" },
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{ BGE_ASICREV_BCM5714_A0,
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"unknown BCM5714" },
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{ BGE_ASICREV_BCM5752,
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"unknown BCM5752" },
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{ BGE_ASICREV_BCM5780,
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"unknown BCM5780" },
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{ BGE_ASICREV_BCM5714,
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"unknown BCM5714" },
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{ 0, NULL }
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};
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#define BGE_IS_5705_OR_BEYOND(sc) \
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((sc)->bge_asicrev == BGE_ASICREV_BCM5705 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5750 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5714_A0 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5780 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5714 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5752)
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#define BGE_IS_575X_PLUS(sc) \
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((sc)->bge_asicrev == BGE_ASICREV_BCM5750 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5714_A0 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5780 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5714 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5752)
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#define BGE_IS_5714_FAMILY(sc) \
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((sc)->bge_asicrev == BGE_ASICREV_BCM5714_A0 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5780 || \
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(sc)->bge_asicrev == BGE_ASICREV_BCM5714)
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#define BGE_IS_JUMBO_CAPABLE(sc) \
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((sc)->bge_asicrev != BGE_ASICREV_BCM5705 && \
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(sc)->bge_asicrev != BGE_ASICREV_BCM5750)
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const struct bge_revision * bge_lookup_rev(uint32_t);
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const struct bge_vendor * bge_lookup_vendor(uint16_t);
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static int bge_probe(device_t);
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static int bge_attach(device_t);
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static int bge_detach(device_t);
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@ -240,12 +363,6 @@ static int bge_init_tx_ring(struct bge_softc *);
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static int bge_chipinit(struct bge_softc *);
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static int bge_blockinit(struct bge_softc *);
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#ifdef notdef
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static uint8_t bge_vpd_readbyte(struct bge_softc *, int);
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static void bge_vpd_read_res(struct bge_softc *, struct vpd_res *, int);
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static void bge_vpd_read(struct bge_softc *);
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#endif
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static uint32_t bge_readmem_ind(struct bge_softc *, int);
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static void bge_writemem_ind(struct bge_softc *, int, int);
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#ifdef notdef
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@ -366,88 +483,6 @@ bge_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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ctx->bge_busaddr = segs->ds_addr;
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}
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#ifdef notdef
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static uint8_t
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bge_vpd_readbyte(struct bge_softc *sc, int addr)
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{
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int i;
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device_t dev;
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uint32_t val;
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dev = sc->bge_dev;
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pci_write_config(dev, BGE_PCI_VPD_ADDR, addr, 2);
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for (i = 0; i < BGE_TIMEOUT * 10; i++) {
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DELAY(10);
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if (pci_read_config(dev, BGE_PCI_VPD_ADDR, 2) & BGE_VPD_FLAG)
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break;
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}
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if (i == BGE_TIMEOUT) {
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device_printf(sc->bge_dev, "VPD read timed out\n");
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return (0);
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}
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val = pci_read_config(dev, BGE_PCI_VPD_DATA, 4);
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return ((val >> ((addr % 4) * 8)) & 0xFF);
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}
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static void
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bge_vpd_read_res(struct bge_softc *sc, struct vpd_res *res, int addr)
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{
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int i;
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uint8_t *ptr;
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ptr = (uint8_t *)res;
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for (i = 0; i < sizeof(struct vpd_res); i++)
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ptr[i] = bge_vpd_readbyte(sc, i + addr);
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}
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static void
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bge_vpd_read(struct bge_softc *sc)
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{
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struct vpd_res res;
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int i, pos = 0;
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if (sc->bge_vpd_prodname != NULL)
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free(sc->bge_vpd_prodname, M_DEVBUF);
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if (sc->bge_vpd_readonly != NULL)
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free(sc->bge_vpd_readonly, M_DEVBUF);
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sc->bge_vpd_prodname = NULL;
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sc->bge_vpd_readonly = NULL;
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bge_vpd_read_res(sc, &res, pos);
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if (res.vr_id != VPD_RES_ID) {
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device_printf(sc->bge_dev,
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"bad VPD resource id: expected %x got %x\n", VPD_RES_ID,
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res.vr_id);
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return;
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}
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pos += sizeof(res);
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sc->bge_vpd_prodname = malloc(res.vr_len + 1, M_DEVBUF, M_NOWAIT);
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for (i = 0; i < res.vr_len; i++)
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sc->bge_vpd_prodname[i] = bge_vpd_readbyte(sc, i + pos);
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sc->bge_vpd_prodname[i] = '\0';
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pos += i;
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bge_vpd_read_res(sc, &res, pos);
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if (res.vr_id != VPD_RES_READ) {
|
||||
device_printf(sc->bge_dev,
|
||||
"bad VPD resource id: expected %x got %x\n", VPD_RES_READ,
|
||||
res.vr_id);
|
||||
return;
|
||||
}
|
||||
|
||||
pos += sizeof(res);
|
||||
sc->bge_vpd_readonly = malloc(res.vr_len, M_DEVBUF, M_NOWAIT);
|
||||
for (i = 0; i < res.vr_len + 1; i++)
|
||||
sc->bge_vpd_readonly[i] = bge_vpd_readbyte(sc, i + pos);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Read a byte of data stored in the EEPROM at address 'addr.' The
|
||||
* BCM570x supports both the traditional bitbang interface and an
|
||||
@ -973,23 +1008,27 @@ bge_chipinit(struct bge_softc *sc)
|
||||
|
||||
/* Set up the PCI DMA control register. */
|
||||
if (sc->bge_pcie) {
|
||||
/* PCI Express bus */
|
||||
dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
|
||||
(0xf << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
|
||||
(0x2 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
|
||||
} else if (pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4) &
|
||||
BGE_PCISTATE_PCI_BUSMODE) {
|
||||
/* Conventional PCI bus */
|
||||
dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
|
||||
(0x7 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
|
||||
(0x7 << BGE_PCIDMARWCTL_WR_WAT_SHIFT) |
|
||||
(0x0F);
|
||||
} else {
|
||||
} else if (sc->bge_pcix) {
|
||||
/* PCI-X bus */
|
||||
/*
|
||||
* The 5704 uses a different encoding of read/write
|
||||
* watermarks.
|
||||
*/
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
|
||||
if (BGE_IS_5714_FAMILY(sc)) {
|
||||
dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD;
|
||||
dma_rw_ctl &= ~BGE_PCIDMARWCTL_ONEDMA_ATONCE; /* XXX */
|
||||
/* XXX magic values, Broadcom-supplied Linux driver */
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5780)
|
||||
dma_rw_ctl |= (1 << 20) | (1 << 18) |
|
||||
BGE_PCIDMARWCTL_ONEDMA_ATONCE;
|
||||
else
|
||||
dma_rw_ctl |= (1 << 20) | (1 << 18) | (1 << 15);
|
||||
|
||||
} else if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
|
||||
/*
|
||||
* The 5704 uses a different encoding of read/write
|
||||
* watermarks.
|
||||
*/
|
||||
dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
|
||||
(0x7 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
|
||||
(0x3 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
|
||||
@ -1011,12 +1050,16 @@ bge_chipinit(struct bge_softc *sc)
|
||||
if (tmp == 0x6 || tmp == 0x7)
|
||||
dma_rw_ctl |= BGE_PCIDMARWCTL_ONEDMA_ATONCE;
|
||||
}
|
||||
}
|
||||
} else
|
||||
/* Conventional PCI bus */
|
||||
dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
|
||||
(0x7 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
|
||||
(0x7 << BGE_PCIDMARWCTL_WR_WAT_SHIFT) |
|
||||
(0x0F);
|
||||
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5703 ||
|
||||
sc->bge_asicrev == BGE_ASICREV_BCM5704 ||
|
||||
sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
|
||||
sc->bge_asicrev == BGE_ASICREV_BCM5750)
|
||||
sc->bge_asicrev == BGE_ASICREV_BCM5705)
|
||||
dma_rw_ctl &= ~BGE_PCIDMARWCTL_MINDMA;
|
||||
pci_write_config(sc->bge_dev, BGE_PCI_DMA_RW_CTL, dma_rw_ctl, 4);
|
||||
|
||||
@ -1068,8 +1111,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
|
||||
/* Note: the BCM5704 has a smaller mbuf space than other chips. */
|
||||
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750) {
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc))) {
|
||||
/* Configure mbuf memory pool */
|
||||
if (sc->bge_extram) {
|
||||
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_BASEADDR,
|
||||
@ -1094,8 +1136,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
}
|
||||
|
||||
/* Configure mbuf pool watermarks */
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
|
||||
sc->bge_asicrev == BGE_ASICREV_BCM5750) {
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc))) {
|
||||
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
|
||||
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x10);
|
||||
} else {
|
||||
@ -1109,8 +1150,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_HIWAT, 10);
|
||||
|
||||
/* Enable buffer manager */
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750) {
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc))) {
|
||||
CSR_WRITE_4(sc, BGE_BMAN_MODE,
|
||||
BGE_BMANMODE_ENABLE|BGE_BMANMODE_LOMBUF_ATTN);
|
||||
|
||||
@ -1152,8 +1192,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
BGE_ADDR_HI(sc->bge_ldata.bge_rx_std_ring_paddr);
|
||||
bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
|
||||
sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_PREREAD);
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
|
||||
sc->bge_asicrev == BGE_ASICREV_BCM5750)
|
||||
if (BGE_IS_5705_OR_BEYOND(sc))
|
||||
rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(512, 0);
|
||||
else
|
||||
rcb->bge_maxlen_flags =
|
||||
@ -1175,8 +1214,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
* using this ring (i.e. once we set the MTU
|
||||
* high enough to require it).
|
||||
*/
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750) {
|
||||
if (BGE_IS_JUMBO_CAPABLE(sc)) {
|
||||
rcb = &sc->bge_ldata.bge_info.bge_jumbo_rx_rcb;
|
||||
|
||||
rcb->bge_hostaddr.bge_addr_lo =
|
||||
@ -1237,8 +1275,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_lo, taddr.bge_addr_lo);
|
||||
RCB_WRITE_4(sc, vrcb, bge_nicaddr,
|
||||
BGE_NIC_TXRING_ADDR(0, BGE_TX_RING_CNT));
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750)
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc)))
|
||||
RCB_WRITE_4(sc, vrcb, bge_maxlen_flags,
|
||||
BGE_RCB_MAXLEN_FLAGS(BGE_TX_RING_CNT, 0));
|
||||
|
||||
@ -1322,8 +1359,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS, sc->bge_tx_coal_ticks);
|
||||
CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS, sc->bge_rx_max_coal_bds);
|
||||
CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS, sc->bge_tx_max_coal_bds);
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750) {
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc))) {
|
||||
CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS_INT, 0);
|
||||
CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS_INT, 0);
|
||||
}
|
||||
@ -1331,8 +1367,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS_INT, 0);
|
||||
|
||||
/* Set up address of statistics block */
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750) {
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc))) {
|
||||
CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_HI,
|
||||
BGE_ADDR_HI(sc->bge_ldata.bge_stats_paddr));
|
||||
CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_LO,
|
||||
@ -1361,8 +1396,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
CSR_WRITE_4(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE);
|
||||
|
||||
/* Turn on RX list selector state machine. */
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750)
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc)))
|
||||
CSR_WRITE_4(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE);
|
||||
|
||||
/* Turn on DMA, clear stats */
|
||||
@ -1384,8 +1418,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
#endif
|
||||
|
||||
/* Turn on DMA completion state machine */
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750)
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc)))
|
||||
CSR_WRITE_4(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE);
|
||||
|
||||
/* Turn on write DMA state machine */
|
||||
@ -1406,8 +1439,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
CSR_WRITE_4(sc, BGE_RDBDI_MODE, BGE_RDBDIMODE_ENABLE);
|
||||
|
||||
/* Turn on Mbuf cluster free state machine */
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750)
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc)))
|
||||
CSR_WRITE_4(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE);
|
||||
|
||||
/* Turn on send BD completion state machine */
|
||||
@ -1441,7 +1473,7 @@ bge_blockinit(struct bge_softc *sc)
|
||||
} else {
|
||||
BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL|10<<16);
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
|
||||
sc->bge_chipid != BGE_CHIPID_BCM5700_B1)
|
||||
sc->bge_chipid != BGE_CHIPID_BCM5700_B2)
|
||||
CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
|
||||
BGE_EVTENB_MI_INTERRUPT);
|
||||
}
|
||||
@ -1463,44 +1495,79 @@ bge_blockinit(struct bge_softc *sc)
|
||||
return (0);
|
||||
}
|
||||
|
||||
const struct bge_revision *
|
||||
bge_lookup_rev(uint32_t chipid)
|
||||
{
|
||||
const struct bge_revision *br;
|
||||
|
||||
for (br = bge_revisions; br->br_name != NULL; br++) {
|
||||
if (br->br_chipid == chipid)
|
||||
return (br);
|
||||
}
|
||||
|
||||
for (br = bge_majorrevs; br->br_name != NULL; br++) {
|
||||
if (br->br_chipid == BGE_ASICREV(chipid))
|
||||
return (br);
|
||||
}
|
||||
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
const struct bge_vendor *
|
||||
bge_lookup_vendor(uint16_t vid)
|
||||
{
|
||||
const struct bge_vendor *v;
|
||||
|
||||
for (v = bge_vendors; v->v_name != NULL; v++)
|
||||
if (v->v_id == vid)
|
||||
return (v);
|
||||
|
||||
panic("%s: unknown vendor %d", __func__, vid);
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
/*
|
||||
* Probe for a Broadcom chip. Check the PCI vendor and device IDs
|
||||
* against our list and return its name if we find a match. Note
|
||||
* that since the Broadcom controller contains VPD support, we
|
||||
* against our list and return its name if we find a match.
|
||||
*
|
||||
* Note that since the Broadcom controller contains VPD support, we
|
||||
* can get the device name string from the controller itself instead
|
||||
* of the compiled-in string. This is a little slow, but it guarantees
|
||||
* we'll always announce the right product name.
|
||||
* we'll always announce the right product name. Unfortunately, this
|
||||
* is possible only later in bge_attach(), when we have established
|
||||
* access to EEPROM.
|
||||
*/
|
||||
static int
|
||||
bge_probe(device_t dev)
|
||||
{
|
||||
struct bge_type *t;
|
||||
struct bge_softc *sc;
|
||||
char *descbuf;
|
||||
struct bge_type *t = bge_devs;
|
||||
struct bge_softc *sc = device_get_softc(dev);
|
||||
|
||||
t = bge_devs;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
bzero(sc, sizeof(struct bge_softc));
|
||||
sc->bge_dev = dev;
|
||||
|
||||
while(t->bge_name != NULL) {
|
||||
while(t->bge_vid != 0) {
|
||||
if ((pci_get_vendor(dev) == t->bge_vid) &&
|
||||
(pci_get_device(dev) == t->bge_did)) {
|
||||
#ifdef notdef
|
||||
bge_vpd_read(sc);
|
||||
device_set_desc(dev, sc->bge_vpd_prodname);
|
||||
#endif
|
||||
descbuf = malloc(BGE_DEVDESC_MAX, M_TEMP, M_NOWAIT);
|
||||
if (descbuf == NULL)
|
||||
return (ENOMEM);
|
||||
snprintf(descbuf, BGE_DEVDESC_MAX,
|
||||
"%s, ASIC rev. %#04x", t->bge_name,
|
||||
pci_read_config(dev, BGE_PCI_MISC_CTL, 4) >> 16);
|
||||
device_set_desc_copy(dev, descbuf);
|
||||
char buf[64];
|
||||
const struct bge_revision *br;
|
||||
const struct bge_vendor *v;
|
||||
uint32_t id;
|
||||
|
||||
id = pci_read_config(dev, BGE_PCI_MISC_CTL, 4) &
|
||||
BGE_PCIMISCCTL_ASICREV;
|
||||
br = bge_lookup_rev(id);
|
||||
id >>= 16;
|
||||
v = bge_lookup_vendor(t->bge_vid);
|
||||
if (br == NULL)
|
||||
snprintf(buf, 64, "%s unknown ASIC (%#04x)",
|
||||
v->v_name, id);
|
||||
else
|
||||
snprintf(buf, 64, "%s %s, ASIC rev. %#04x",
|
||||
v->v_name, br->br_name, id);
|
||||
device_set_desc_copy(dev, buf);
|
||||
if (pci_get_subvendor(dev) == DELL_VENDORID)
|
||||
sc->bge_no_3_led = 1;
|
||||
free(descbuf, M_TEMP);
|
||||
return (0);
|
||||
}
|
||||
t++;
|
||||
@ -1721,8 +1788,7 @@ bge_dma_alloc(device_t dev)
|
||||
sc->bge_ldata.bge_rx_std_ring_paddr = ctx.bge_busaddr;
|
||||
|
||||
/* Create tags for jumbo mbufs. */
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750) {
|
||||
if (BGE_IS_JUMBO_CAPABLE(sc)) {
|
||||
error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
|
||||
1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
|
||||
NULL, MJUM9BYTES, BGE_NSEG_JUMBO, PAGE_SIZE,
|
||||
@ -1970,19 +2036,11 @@ bge_attach(device_t dev)
|
||||
sc->bge_asicrev = BGE_ASICREV(sc->bge_chipid);
|
||||
sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid);
|
||||
|
||||
/*
|
||||
* Treat the 5714 and the 5752 like the 5750 until we have more info
|
||||
* on this chip.
|
||||
*/
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5714 ||
|
||||
sc->bge_asicrev == BGE_ASICREV_BCM5752)
|
||||
sc->bge_asicrev = BGE_ASICREV_BCM5750;
|
||||
|
||||
/*
|
||||
* XXX: Broadcom Linux driver. Not in specs or eratta.
|
||||
* PCI-Express?
|
||||
*/
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5750) {
|
||||
if (BGE_IS_5705_OR_BEYOND(sc)) {
|
||||
uint32_t v;
|
||||
|
||||
v = pci_read_config(dev, BGE_PCI_MSI_CAPID, 4);
|
||||
@ -1993,6 +2051,13 @@ bge_attach(device_t dev)
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* PCI-X ?
|
||||
*/
|
||||
if ((pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4) &
|
||||
BGE_PCISTATE_PCI_BUSMODE) == 0)
|
||||
sc->bge_pcix = 1;
|
||||
|
||||
/* Try to reset the chip. */
|
||||
bge_reset(sc);
|
||||
|
||||
@ -2024,8 +2089,7 @@ bge_attach(device_t dev)
|
||||
}
|
||||
|
||||
/* 5705 limits RX return ring to 512 entries. */
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
|
||||
sc->bge_asicrev == BGE_ASICREV_BCM5750)
|
||||
if (BGE_IS_5705_OR_BEYOND(sc))
|
||||
sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
|
||||
else
|
||||
sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT;
|
||||
@ -2141,18 +2205,8 @@ bge_attach(device_t dev)
|
||||
* which do not support unaligned accesses, we will realign the
|
||||
* payloads by copying the received packets.
|
||||
*/
|
||||
switch (sc->bge_chipid) {
|
||||
case BGE_CHIPID_BCM5701_A0:
|
||||
case BGE_CHIPID_BCM5701_B0:
|
||||
case BGE_CHIPID_BCM5701_B2:
|
||||
case BGE_CHIPID_BCM5701_B5:
|
||||
/* If in PCI-X mode, work around the alignment bug. */
|
||||
if ((pci_read_config(dev, BGE_PCI_PCISTATE, 4) &
|
||||
(BGE_PCISTATE_PCI_BUSMODE | BGE_PCISTATE_PCI_BUSSPEED)) ==
|
||||
BGE_PCISTATE_PCI_BUSSPEED)
|
||||
sc->bge_rx_alignment_bug = 1;
|
||||
break;
|
||||
}
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5701 && sc->bge_pcix)
|
||||
sc->bge_rx_alignment_bug = 1;
|
||||
|
||||
/*
|
||||
* Call MI attach routine.
|
||||
@ -2298,8 +2352,12 @@ bge_reset(struct bge_softc *sc)
|
||||
bge_writereg_ind(sc, BGE_MISC_CFG, (65 << 1));
|
||||
|
||||
/* Enable memory arbiter. */
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750)
|
||||
if (BGE_IS_5714_FAMILY(sc)) {
|
||||
uint32_t val;
|
||||
|
||||
val = CSR_READ_4(sc, BGE_MARB_MODE);
|
||||
CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE | val);
|
||||
} else
|
||||
CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE);
|
||||
|
||||
/*
|
||||
@ -2395,12 +2453,9 @@ bge_rxeof(struct bge_softc *sc)
|
||||
sc->bge_cdata.bge_rx_return_ring_map, BUS_DMASYNC_POSTREAD);
|
||||
bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
|
||||
sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_POSTREAD);
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750) {
|
||||
if (BGE_IS_JUMBO_CAPABLE(sc))
|
||||
bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
|
||||
sc->bge_cdata.bge_rx_jumbo_ring_map,
|
||||
BUS_DMASYNC_POSTREAD);
|
||||
}
|
||||
sc->bge_cdata.bge_rx_jumbo_ring_map, BUS_DMASYNC_POSTREAD);
|
||||
|
||||
while(sc->bge_rx_saved_considx !=
|
||||
sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx) {
|
||||
@ -2521,13 +2576,10 @@ bge_rxeof(struct bge_softc *sc)
|
||||
if (stdcnt > 0)
|
||||
bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
|
||||
sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_PREWRITE);
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750) {
|
||||
if (jumbocnt > 0)
|
||||
bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
|
||||
sc->bge_cdata.bge_rx_jumbo_ring_map,
|
||||
BUS_DMASYNC_PREWRITE);
|
||||
}
|
||||
|
||||
if (BGE_IS_JUMBO_CAPABLE(sc) && jumbocnt > 0)
|
||||
bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
|
||||
sc->bge_cdata.bge_rx_jumbo_ring_map, BUS_DMASYNC_PREWRITE);
|
||||
|
||||
CSR_WRITE_4(sc, BGE_MBX_RX_CONS0_LO, sc->bge_rx_saved_considx);
|
||||
if (stdcnt)
|
||||
@ -2612,7 +2664,7 @@ bge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
|
||||
|
||||
if (cmd == POLL_AND_CHECK_STATUS)
|
||||
if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
|
||||
sc->bge_chipid != BGE_CHIPID_BCM5700_B1) ||
|
||||
sc->bge_chipid != BGE_CHIPID_BCM5700_B2) ||
|
||||
sc->bge_link_evt || sc->bge_tbi)
|
||||
bge_link_upd(sc);
|
||||
|
||||
@ -2661,7 +2713,7 @@ bge_intr(void *xsc)
|
||||
sc->bge_cdata.bge_status_map, BUS_DMASYNC_PREREAD);
|
||||
|
||||
if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
|
||||
sc->bge_chipid != BGE_CHIPID_BCM5700_B1) ||
|
||||
sc->bge_chipid != BGE_CHIPID_BCM5700_B2) ||
|
||||
statusword || sc->bge_link_evt)
|
||||
bge_link_upd(sc);
|
||||
|
||||
@ -2690,8 +2742,7 @@ bge_tick_locked(struct bge_softc *sc)
|
||||
|
||||
BGE_LOCK_ASSERT(sc);
|
||||
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
|
||||
sc->bge_asicrev == BGE_ASICREV_BCM5750)
|
||||
if (BGE_IS_5705_OR_BEYOND(sc))
|
||||
bge_stats_update_regs(sc);
|
||||
else
|
||||
bge_stats_update(sc);
|
||||
@ -3244,6 +3295,10 @@ bge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
|
||||
if (CSR_READ_4(sc, BGE_MAC_STS) &
|
||||
BGE_MACSTAT_TBI_PCS_SYNCHED)
|
||||
ifmr->ifm_status |= IFM_ACTIVE;
|
||||
else {
|
||||
ifmr->ifm_active |= IFM_NONE;
|
||||
return;
|
||||
}
|
||||
ifmr->ifm_active |= IFM_1000_SX;
|
||||
if (CSR_READ_4(sc, BGE_MAC_MODE) & BGE_MACMODE_HALF_DUPLEX)
|
||||
ifmr->ifm_active |= IFM_HDX;
|
||||
@ -3268,12 +3323,13 @@ bge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
|
||||
|
||||
switch (command) {
|
||||
case SIOCSIFMTU:
|
||||
/* Disallow jumbo frames on 5705. */
|
||||
if (((sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
|
||||
sc->bge_asicrev == BGE_ASICREV_BCM5750) &&
|
||||
ifr->ifr_mtu > ETHERMTU) || ifr->ifr_mtu > BGE_JUMBO_MTU)
|
||||
if (ifr->ifr_mtu < ETHERMIN ||
|
||||
((BGE_IS_JUMBO_CAPABLE(sc)) &&
|
||||
ifr->ifr_mtu > BGE_JUMBO_MTU) ||
|
||||
((!BGE_IS_JUMBO_CAPABLE(sc)) &&
|
||||
ifr->ifr_mtu > ETHERMTU))
|
||||
error = EINVAL;
|
||||
else {
|
||||
else if (ifp->if_mtu != ifr->ifr_mtu) {
|
||||
ifp->if_mtu = ifr->ifr_mtu;
|
||||
ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
|
||||
bge_init(sc);
|
||||
@ -3424,8 +3480,7 @@ bge_stop(struct bge_softc *sc)
|
||||
BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE);
|
||||
BGE_CLRBIT(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE);
|
||||
BGE_CLRBIT(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE);
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750)
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc)))
|
||||
BGE_CLRBIT(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE);
|
||||
BGE_CLRBIT(sc, BGE_RDBDI_MODE, BGE_RBDIMODE_ENABLE);
|
||||
BGE_CLRBIT(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE);
|
||||
@ -3439,8 +3494,7 @@ bge_stop(struct bge_softc *sc)
|
||||
BGE_CLRBIT(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE);
|
||||
BGE_CLRBIT(sc, BGE_RDMA_MODE, BGE_RDMAMODE_ENABLE);
|
||||
BGE_CLRBIT(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE);
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750)
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc)))
|
||||
BGE_CLRBIT(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE);
|
||||
BGE_CLRBIT(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE);
|
||||
|
||||
@ -3450,13 +3504,11 @@ bge_stop(struct bge_softc *sc)
|
||||
*/
|
||||
BGE_CLRBIT(sc, BGE_HCC_MODE, BGE_HCCMODE_ENABLE);
|
||||
BGE_CLRBIT(sc, BGE_WDMA_MODE, BGE_WDMAMODE_ENABLE);
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750)
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc)))
|
||||
BGE_CLRBIT(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE);
|
||||
CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF);
|
||||
CSR_WRITE_4(sc, BGE_FTQ_RESET, 0);
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750) {
|
||||
if (!(BGE_IS_5705_OR_BEYOND(sc))) {
|
||||
BGE_CLRBIT(sc, BGE_BMAN_MODE, BGE_BMANMODE_ENABLE);
|
||||
BGE_CLRBIT(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE);
|
||||
}
|
||||
@ -3474,8 +3526,7 @@ bge_stop(struct bge_softc *sc)
|
||||
bge_free_rx_ring_std(sc);
|
||||
|
||||
/* Free jumbo RX list. */
|
||||
if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
|
||||
sc->bge_asicrev != BGE_ASICREV_BCM5750)
|
||||
if (BGE_IS_JUMBO_CAPABLE(sc))
|
||||
bge_free_rx_ring_jumbo(sc);
|
||||
|
||||
/* Free TX buffers. */
|
||||
@ -3589,11 +3640,11 @@ bge_link_upd(struct bge_softc *sc)
|
||||
* the interrupt handler.
|
||||
*
|
||||
* XXX: perhaps link state detection procedure used for
|
||||
* BGE_CHIPID_BCM5700_B1 can be used for others BCM5700 revisions.
|
||||
* BGE_CHIPID_BCM5700_B2 can be used for others BCM5700 revisions.
|
||||
*/
|
||||
|
||||
if (sc->bge_asicrev == BGE_ASICREV_BCM5700 &&
|
||||
sc->bge_chipid != BGE_CHIPID_BCM5700_B1) {
|
||||
sc->bge_chipid != BGE_CHIPID_BCM5700_B2) {
|
||||
status = CSR_READ_4(sc, BGE_MAC_STS);
|
||||
if (status & BGE_MACSTAT_MI_INTERRUPT) {
|
||||
callout_stop(&sc->bge_stat_ch);
|
||||
|
||||
@ -224,9 +224,12 @@
|
||||
|
||||
#define BGE_CHIPID_TIGON_I 0x40000000
|
||||
#define BGE_CHIPID_TIGON_II 0x60000000
|
||||
#define BGE_CHIPID_BCM5700_A0 0x70000000
|
||||
#define BGE_CHIPID_BCM5700_A1 0x70010000
|
||||
#define BGE_CHIPID_BCM5700_B0 0x71000000
|
||||
#define BGE_CHIPID_BCM5700_B1 0x71020000
|
||||
#define BGE_CHIPID_BCM5700_B2 0x71030000
|
||||
#define BGE_CHIPID_BCM5700_B1 0x71010000
|
||||
#define BGE_CHIPID_BCM5700_B2 0x71020000
|
||||
#define BGE_CHIPID_BCM5700_B3 0x71030000
|
||||
#define BGE_CHIPID_BCM5700_ALTIMA 0x71040000
|
||||
#define BGE_CHIPID_BCM5700_C0 0x72000000
|
||||
#define BGE_CHIPID_BCM5701_A0 0x00000000 /* grrrr */
|
||||
@ -236,27 +239,44 @@
|
||||
#define BGE_CHIPID_BCM5703_A0 0x10000000
|
||||
#define BGE_CHIPID_BCM5703_A1 0x10010000
|
||||
#define BGE_CHIPID_BCM5703_A2 0x10020000
|
||||
#define BGE_CHIPID_BCM5703_A3 0x10030000
|
||||
#define BGE_CHIPID_BCM5704_A0 0x20000000
|
||||
#define BGE_CHIPID_BCM5704_A1 0x20010000
|
||||
#define BGE_CHIPID_BCM5704_A2 0x20020000
|
||||
#define BGE_CHIPID_BCM5704_A3 0x20030000
|
||||
#define BGE_CHIPID_BCM5704_B0 0x21000000
|
||||
#define BGE_CHIPID_BCM5705_A0 0x30000000
|
||||
#define BGE_CHIPID_BCM5705_A1 0x30010000
|
||||
#define BGE_CHIPID_BCM5705_A2 0x30020000
|
||||
#define BGE_CHIPID_BCM5705_A3 0x30030000
|
||||
#define BGE_CHIPID_BCM5750_A0 0x40000000
|
||||
#define BGE_CHIPID_BCM5750_A1 0x40010000
|
||||
#define BGE_CHIPID_BCM5750_A3 0x40030000
|
||||
#define BGE_CHIPID_BCM5750_B0 0x40100000
|
||||
#define BGE_CHIPID_BCM5750_B1 0x41010000
|
||||
#define BGE_CHIPID_BCM5750_C0 0x42000000
|
||||
#define BGE_CHIPID_BCM5750_C1 0x42010000
|
||||
#define BGE_CHIPID_BCM5714_A0 0x50000000
|
||||
#define BGE_CHIPID_BCM5752_A0 0x60000000
|
||||
#define BGE_CHIPID_BCM5752_A1 0x60010000
|
||||
#define BGE_CHIPID_BCM5752_A2 0x60020000
|
||||
#define BGE_CHIPID_BCM5714_B0 0x80000000
|
||||
#define BGE_CHIPID_BCM5714_B3 0x80030000
|
||||
#define BGE_CHIPID_BCM5715_A0 0x90000000
|
||||
#define BGE_CHIPID_BCM5715_A1 0x90010000
|
||||
|
||||
/* shorthand one */
|
||||
#define BGE_ASICREV(x) ((x) >> 28)
|
||||
#define BGE_ASICREV_BCM5700 0x07
|
||||
#define BGE_ASICREV_BCM5701 0x00
|
||||
#define BGE_ASICREV_BCM5703 0x01
|
||||
#define BGE_ASICREV_BCM5704 0x02
|
||||
#define BGE_ASICREV_BCM5705 0x03
|
||||
#define BGE_ASICREV_BCM5750 0x04
|
||||
#define BGE_ASICREV_BCM5714 0x05
|
||||
#define BGE_ASICREV_BCM5714_A0 0x05
|
||||
#define BGE_ASICREV_BCM5752 0x06
|
||||
#define BGE_ASICREV_BCM5700 0x07
|
||||
#define BGE_ASICREV_BCM5780 0x08
|
||||
#define BGE_ASICREV_BCM5714 0x09
|
||||
|
||||
/* chip revisions */
|
||||
#define BGE_CHIPREV(x) ((x) >> 24)
|
||||
@ -1939,37 +1959,54 @@ struct bge_status_block {
|
||||
#define BCOM_VENDORID 0x14E4
|
||||
#define BCOM_DEVICEID_BCM5700 0x1644
|
||||
#define BCOM_DEVICEID_BCM5701 0x1645
|
||||
#define BCOM_DEVICEID_BCM5702 0x16A6
|
||||
#define BCOM_DEVICEID_BCM5702X 0x16C6
|
||||
#define BCOM_DEVICEID_BCM5703 0x16A7
|
||||
#define BCOM_DEVICEID_BCM5703X 0x16C7
|
||||
#define BCOM_DEVICEID_BCM5702 0x1646
|
||||
#define BCOM_DEVICEID_BCM5702X 0x16A6
|
||||
#define BCOM_DEVICEID_BCM5702_ALT 0x16C6
|
||||
#define BCOM_DEVICEID_BCM5703 0x1647
|
||||
#define BCOM_DEVICEID_BCM5703X 0x16A7
|
||||
#define BCOM_DEVICEID_BCM5703_ALT 0x16C7
|
||||
#define BCOM_DEVICEID_BCM5704C 0x1648
|
||||
#define BCOM_DEVICEID_BCM5704S 0x16A8
|
||||
#define BCOM_DEVICEID_BCM5704S_ALT 0x1649
|
||||
#define BCOM_DEVICEID_BCM5705 0x1653
|
||||
#define BCOM_DEVICEID_BCM5705K 0x1654
|
||||
#define BCOM_DEVICEID_BCM5721 0x1659
|
||||
#define BCOM_DEVICEID_BCM5705F 0x166E
|
||||
#define BCOM_DEVICEID_BCM5705M 0x165D
|
||||
#define BCOM_DEVICEID_BCM5705M_ALT 0x165E
|
||||
#define BCOM_DEVICEID_BCM5714C 0x1668
|
||||
#define BCOM_DEVICEID_BCM5714S 0x1669
|
||||
#define BCOM_DEVICEID_BCM5715 0x1678
|
||||
#define BCOM_DEVICEID_BCM5715S 0x1679
|
||||
#define BCOM_DEVICEID_BCM5720 0x1658
|
||||
#define BCOM_DEVICEID_BCM5721 0x1659
|
||||
#define BCOM_DEVICEID_BCM5750 0x1676
|
||||
#define BCOM_DEVICEID_BCM5750M 0x167C
|
||||
#define BCOM_DEVICEID_BCM5751 0x1677
|
||||
#define BCOM_DEVICEID_BCM5751F 0x167E
|
||||
#define BCOM_DEVICEID_BCM5751M 0x167D
|
||||
#define BCOM_DEVICEID_BCM5752 0x1600
|
||||
#define BCOM_DEVICEID_BCM5752M 0x1601
|
||||
#define BCOM_DEVICEID_BCM5753 0x16F7
|
||||
#define BCOM_DEVICEID_BCM5753F 0x16FE
|
||||
#define BCOM_DEVICEID_BCM5753M 0x16FD
|
||||
#define BCOM_DEVICEID_BCM5780 0x166A
|
||||
#define BCOM_DEVICEID_BCM5780S 0x166B
|
||||
#define BCOM_DEVICEID_BCM5781 0x16DD
|
||||
#define BCOM_DEVICEID_BCM5782 0x1696
|
||||
#define BCOM_DEVICEID_BCM5788 0x169C
|
||||
#define BCOM_DEVICEID_BCM5789 0x169D
|
||||
#define BCOM_DEVICEID_BCM5901 0x170D
|
||||
#define BCOM_DEVICEID_BCM5901A2 0x170E
|
||||
#define BCOM_DEVICEID_BCM5903M 0x16FF
|
||||
|
||||
/*
|
||||
* Alteon AceNIC PCI vendor/device ID.
|
||||
*/
|
||||
#define ALT_VENDORID 0x12AE
|
||||
#define ALT_DEVICEID_ACENIC 0x0001
|
||||
#define ALT_DEVICEID_ACENIC_COPPER 0x0002
|
||||
#define ALT_DEVICEID_BCM5700 0x0003
|
||||
#define ALT_DEVICEID_BCM5701 0x0004
|
||||
#define ALTEON_VENDORID 0x12AE
|
||||
#define ALTEON_DEVICEID_ACENIC 0x0001
|
||||
#define ALTEON_DEVICEID_ACENIC_COPPER 0x0002
|
||||
#define ALTEON_DEVICEID_BCM5700 0x0003
|
||||
#define ALTEON_DEVICEID_BCM5701 0x0004
|
||||
|
||||
/*
|
||||
* 3Com 3c985 PCI vendor/device ID.
|
||||
@ -2000,6 +2037,12 @@ struct bge_status_block {
|
||||
|
||||
#define DELL_VENDORID 0x1028
|
||||
|
||||
/*
|
||||
* Apple PCI vendor ID.
|
||||
*/
|
||||
#define APPLE_VENDORID 0x106b
|
||||
#define APPLE_DEVICE_BCM5701 0x1645
|
||||
|
||||
/*
|
||||
* Offset of MAC address inside EEPROM.
|
||||
*/
|
||||
@ -2369,12 +2412,6 @@ struct bge_dmamap_arg {
|
||||
struct bge_tx_bd *bge_ring;
|
||||
};
|
||||
|
||||
struct bge_type {
|
||||
uint16_t bge_vid;
|
||||
uint16_t bge_did;
|
||||
char *bge_name;
|
||||
};
|
||||
|
||||
#define BGE_HWREV_TIGON 0x01
|
||||
#define BGE_HWREV_TIGON_II 0x02
|
||||
#define BGE_TIMEOUT 100000
|
||||
@ -2404,6 +2441,7 @@ struct bge_softc {
|
||||
uint8_t bge_chiprev;
|
||||
uint8_t bge_no_3_led;
|
||||
uint8_t bge_pcie;
|
||||
uint8_t bge_pcix;
|
||||
struct bge_ring_data bge_ldata; /* rings */
|
||||
struct bge_chain_data bge_cdata; /* mbufs */
|
||||
uint16_t bge_tx_saved_considx;
|
||||
|
||||
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Reference in New Issue
Block a user