[iwm] Sync rs (rate-selection) API definitions from Linux iwlwifi.
* While there clean up alignments and line wrapping in existing definitions for rs API in if_iwmreg.h Obtained from: dragonflybsd.git 085e37a042bdb17081e495e46919359ce43aa118
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@ -3981,12 +3981,12 @@ enum {
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* Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
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* 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
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*/
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#define IWM_RATE_MCS_CHAN_WIDTH_POS 11
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#define IWM_RATE_MCS_CHAN_WIDTH_MSK (3 << IWM_RATE_MCS_CHAN_WIDTH_POS)
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#define IWM_RATE_MCS_CHAN_WIDTH_20 (0 << IWM_RATE_MCS_CHAN_WIDTH_POS)
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#define IWM_RATE_MCS_CHAN_WIDTH_40 (1 << IWM_RATE_MCS_CHAN_WIDTH_POS)
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#define IWM_RATE_MCS_CHAN_WIDTH_80 (2 << IWM_RATE_MCS_CHAN_WIDTH_POS)
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#define IWM_RATE_MCS_CHAN_WIDTH_160 (3 << IWM_RATE_MCS_CHAN_WIDTH_POS)
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#define IWM_RATE_MCS_CHAN_WIDTH_POS 11
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#define IWM_RATE_MCS_CHAN_WIDTH_MSK (3 << IWM_RATE_MCS_CHAN_WIDTH_POS)
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#define IWM_RATE_MCS_CHAN_WIDTH_20 (0 << IWM_RATE_MCS_CHAN_WIDTH_POS)
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#define IWM_RATE_MCS_CHAN_WIDTH_40 (1 << IWM_RATE_MCS_CHAN_WIDTH_POS)
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#define IWM_RATE_MCS_CHAN_WIDTH_80 (2 << IWM_RATE_MCS_CHAN_WIDTH_POS)
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#define IWM_RATE_MCS_CHAN_WIDTH_160 (3 << IWM_RATE_MCS_CHAN_WIDTH_POS)
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/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
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#define IWM_RATE_MCS_SGI_POS 13
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@ -3999,7 +3999,7 @@ enum {
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#define IWM_RATE_MCS_ANT_C_MSK (4 << IWM_RATE_MCS_ANT_POS)
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#define IWM_RATE_MCS_ANT_AB_MSK (IWM_RATE_MCS_ANT_A_MSK | \
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IWM_RATE_MCS_ANT_B_MSK)
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#define IWM_RATE_MCS_ANT_ABC_MSK (IWM_RATE_MCS_ANT_AB_MSK | \
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#define IWM_RATE_MCS_ANT_ABC_MSK (IWM_RATE_MCS_ANT_AB_MSK | \
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IWM_RATE_MCS_ANT_C_MSK)
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#define IWM_RATE_MCS_ANT_MSK IWM_RATE_MCS_ANT_ABC_MSK
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#define IWM_RATE_MCS_ANT_NUM 3
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@ -4009,8 +4009,8 @@ enum {
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#define IWM_RATE_MCS_STBC_MSK (1 << IWM_RATE_MCS_STBC_POS)
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/* Bit 19: (0) Beamforming is off, (1) Beamforming is on */
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#define IWM_RATE_MCS_BF_POS 19
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#define IWM_RATE_MCS_BF_MSK (1 << IWM_RATE_MCS_BF_POS)
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#define IWM_RATE_MCS_BF_POS 19
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#define IWM_RATE_MCS_BF_MSK (1 << IWM_RATE_MCS_BF_POS)
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/* Bit 20: (0) ZLF is off, (1) ZLF is on */
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#define IWM_RATE_MCS_ZLF_POS 20
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@ -4033,28 +4033,64 @@ enum {
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/* Link quality command flags bit fields */
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/* Bit 0: (0) Don't use RTS (1) Use RTS */
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#define IWM_LQ_FLAG_USE_RTS_POS 0
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#define IWM_LQ_FLAG_USE_RTS_MSK (1 << IWM_LQ_FLAG_USE_RTS_POS)
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#define IWM_LQ_FLAG_USE_RTS_POS 0
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#define IWM_LQ_FLAG_USE_RTS_MSK (1 << IWM_LQ_FLAG_USE_RTS_POS)
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/* Bit 1-3: LQ command color. Used to match responses to LQ commands */
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#define IWM_LQ_FLAG_COLOR_POS 1
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#define IWM_LQ_FLAG_COLOR_MSK (7 << IWM_LQ_FLAG_COLOR_POS)
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#define IWM_LQ_FLAG_COLOR_POS 1
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#define IWM_LQ_FLAG_COLOR_MSK (7 << IWM_LQ_FLAG_COLOR_POS)
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/* Bit 4-5: Tx RTS BW Signalling
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* (0) No RTS BW signalling
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* (1) Static BW signalling
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* (2) Dynamic BW signalling
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*/
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#define IWM_LQ_FLAG_RTS_BW_SIG_POS 4
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#define IWM_LQ_FLAG_RTS_BW_SIG_NONE (0 << IWM_LQ_FLAG_RTS_BW_SIG_POS)
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#define IWM_LQ_FLAG_RTS_BW_SIG_STATIC (1 << IWM_LQ_FLAG_RTS_BW_SIG_POS)
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#define IWM_LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << IWM_LQ_FLAG_RTS_BW_SIG_POS)
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#define IWM_LQ_FLAG_RTS_BW_SIG_POS 4
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#define IWM_LQ_FLAG_RTS_BW_SIG_NONE (0 << IWM_LQ_FLAG_RTS_BW_SIG_POS)
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#define IWM_LQ_FLAG_RTS_BW_SIG_STATIC (1 << IWM_LQ_FLAG_RTS_BW_SIG_POS)
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#define IWM_LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << IWM_LQ_FLAG_RTS_BW_SIG_POS)
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/* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
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* Dyanmic BW selection allows Tx with narrower BW then requested in rates
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*/
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#define IWM_LQ_FLAG_DYNAMIC_BW_POS 6
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#define IWM_LQ_FLAG_DYNAMIC_BW_MSK (1 << IWM_LQ_FLAG_DYNAMIC_BW_POS)
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#define IWM_LQ_FLAG_DYNAMIC_BW_POS 6
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#define IWM_LQ_FLAG_DYNAMIC_BW_MSK (1 << IWM_LQ_FLAG_DYNAMIC_BW_POS)
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/* Single Stream Tx Parameters (lq_cmd->ss_params)
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* Flags to control a smart FW decision about whether BFER/STBC/SISO will be
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* used for single stream Tx.
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*/
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/* Bit 0-1: Max STBC streams allowed. Can be 0-3.
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* (0) - No STBC allowed
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* (1) - 2x1 STBC allowed (HT/VHT)
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* (2) - 4x2 STBC allowed (HT/VHT)
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* (3) - 3x2 STBC allowed (HT only)
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* All our chips are at most 2 antennas so only (1) is valid for now.
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*/
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#define IWM_LQ_SS_STBC_ALLOWED_POS 0
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#define IWM_LQ_SS_STBC_ALLOWED_MSK (3 << IWM_LQ_SS_STBC_ALLOWED_MSK)
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/* 2x1 STBC is allowed */
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#define IWM_LQ_SS_STBC_1SS_ALLOWED (1 << IWM_LQ_SS_STBC_ALLOWED_POS)
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/* Bit 2: Beamformer (VHT only) is allowed */
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#define IWM_LQ_SS_BFER_ALLOWED_POS 2
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#define IWM_LQ_SS_BFER_ALLOWED (1 << IWM_LQ_SS_BFER_ALLOWED_POS)
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/* Bit 3: Force BFER or STBC for testing
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* If this is set:
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* If BFER is allowed then force the ucode to choose BFER else
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* If STBC is allowed then force the ucode to choose STBC over SISO
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*/
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#define IWM_LQ_SS_FORCE_POS 3
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#define IWM_LQ_SS_FORCE (1 << IWM_LQ_SS_FORCE_POS)
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/* Bit 31: ss_params field is valid. Used for FW backward compatibility
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* with other drivers which don't support the ss_params API yet
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*/
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#define IWM_LQ_SS_PARAMS_VALID_POS 31
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#define IWM_LQ_SS_PARAMS_VALID (1 << IWM_LQ_SS_PARAMS_VALID_POS)
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/**
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* struct iwm_lq_cmd - link quality command
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@ -4078,11 +4114,11 @@ enum {
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* 2 - 0x3f: maximal number of frames (up to 3f == 63)
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* @rs_table: array of rates for each TX try, each is rate_n_flags,
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* meaning it is a combination of IWM_RATE_MCS_* and IWM_RATE_*_PLCP
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* @bf_params: beam forming params, currently not used
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* @ss_params: single stream features. declare whether STBC or BFER are allowed.
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*/
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struct iwm_lq_cmd {
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uint8_t sta_id;
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uint8_t reserved1;
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uint8_t reduced_tpc;
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uint16_t control;
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/* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */
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uint8_t flags;
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@ -4096,7 +4132,7 @@ struct iwm_lq_cmd {
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uint8_t agg_frame_cnt_limit;
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uint32_t reserved2;
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uint32_t rs_table[IWM_LQ_MAX_RETRY_NUM];
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uint32_t bf_params;
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uint32_t ss_params;
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}; /* LINK_QUALITY_CMD_API_S_VER_1 */
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/*
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@ -4533,7 +4569,8 @@ struct iwm_mvm_tx_resp {
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uint8_t pa_integ_res_b[3];
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uint8_t pa_integ_res_c[3];
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uint16_t measurement_req_id;
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uint16_t reserved;
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uint8_t reduced_tpc;
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uint8_t reserved;
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uint32_t tfd_info;
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uint16_t seq_ctl;
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