When changing the sd bus clock divisor, clear just the bus clock enable bit

before changing the divisor bits in the register.  We were writing a zero
to the register, which clears the enable, but also cleared the divisor bits
at the same time.  That's a violation of the sdhci spec, which says the
divisor can only be changed when the clock is disabled.  This has worked
okay on most hardware for years, but the TI OMAP controller would misbehave
after changing the divisor improperly.

Submitted by:	Svatopluk Kraus <onwahe@gmail.com>

sys/dev/sdhci/sdhci.c

@@ -235,7 +235,8 @@ sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock)
 	slot->clock = clock;
 
 	/* Turn off the clock. */
-	WR2(slot, SDHCI_CLOCK_CONTROL, 0);
+	clk = RD2(slot, SDHCI_CLOCK_CONTROL);
+	WR2(slot, SDHCI_CLOCK_CONTROL, clk & ~SDHCI_CLOCK_CARD_EN);
 	/* If no clock requested - left it so. */
 	if (clock == 0)
 		return;