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ARM: Remove trailing whitespace from sys/arm/include

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No functional changes.

Approved by:    kib (mentor)
This commit is contained in:
mmel 2015-11-10 12:02:41 +00:00
parent ae122b2548
commit 4e3a5b4299
15 changed files with 43 additions and 43 deletions
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2
sys/arm/include/_stdint.h
View File

@ -139,7 +139,7 @@
* 7.18.3 Limits of other integer types
*/
/* Limits of ptrdiff_t. */
#define PTRDIFF_MIN INT32_MIN
#define PTRDIFF_MIN INT32_MIN
#define PTRDIFF_MAX INT32_MAX
/* Limits of sig_atomic_t. */

2
sys/arm/include/armreg.h
View File

@ -285,7 +285,7 @@
* in r0 steppings. See errata
* 364296.
*/
/* ARM1176 Auxiliary Control Register (CP15 register 1, opcode2 1) */
/* ARM1176 Auxiliary Control Register (CP15 register 1, opcode2 1) */
#define ARM1176_AUXCTL_PHD 0x10000000 /* inst. prefetch halting disable */
#define ARM1176_AUXCTL_BFD 0x20000000 /* branch folding disable */
#define ARM1176_AUXCTL_FSD 0x40000000 /* force speculative ops disable */

2
sys/arm/include/asm.h
View File

@ -167,7 +167,7 @@
#else
#define __FBSDID(s) /* nothing */
#endif
#define WEAK_ALIAS(alias,sym) \
.weak alias; \

10
sys/arm/include/atags.h
View File

@ -64,7 +64,7 @@ struct arm_lbabi_core
uint32_t pagesize;
uint32_t rootdev;
};
/*
* ATAG_MEM data -- Can be more than one to describe different
* banks.
@ -75,7 +75,7 @@ struct arm_lbabi_mem32
uint32_t start; /* start of physical memory */
};
/*
/*
* ATAG_INITRD2 - Compressed ramdisk image details
*/
struct arm_lbabi_initrd
@ -92,7 +92,7 @@ struct arm_lbabi_serial_number
uint32_t low;
uint32_t high;
};
/*
* ATAG_REVISION - board revision
*/
@ -100,7 +100,7 @@ struct arm_lbabi_revision
{
uint32_t rev;
};
/*
* ATAG_CMDLINE - Command line from uboot
*/
@ -109,7 +109,7 @@ struct arm_lbabi_command_line
char command[1]; /* Minimum command length */
};
struct arm_lbabi_tag
struct arm_lbabi_tag
{
struct arm_lbabi_header tag_hdr;
union {

4
sys/arm/include/atomic-v4.h
View File

@ -116,7 +116,7 @@ static __inline u_int32_t
atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval)
{
int ret;
__with_interrupts_disabled(
{
if (*p == cmpval) {
@ -133,7 +133,7 @@ static __inline u_int64_t
atomic_cmpset_64(volatile u_int64_t *p, volatile u_int64_t cmpval, volatile u_int64_t newval)
{
int ret;
__with_interrupts_disabled(
{
if (*p == cmpval) {

2
sys/arm/include/board.h
View File

@ -37,7 +37,7 @@ struct arm_board {
const char *board_name; /* Human readable name */
arm_board_init_fn *board_init; /* Board initialize code */
};
#if defined(ARM_MANY_BOARD)
#include "board_id.h"

30
sys/arm/include/bus.h
View File

@ -128,7 +128,7 @@ struct bus_space {
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rm_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* read region */
void (*bs_rr_1) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint8_t *, bus_size_t);
@ -138,7 +138,7 @@ struct bus_space {
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rr_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* Write single, the less commonly used functions. */
void (*bs_w_2) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint16_t);
@ -154,7 +154,7 @@ struct bus_space {
bus_size_t, const uint32_t *, bus_size_t);
void (*bs_wm_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint64_t *, bus_size_t);
/* write region */
void (*bs_wr_1) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint8_t *, bus_size_t);
@ -210,7 +210,7 @@ struct bus_space {
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rm_8_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* read region stream */
void (*bs_rr_1_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint8_t *, bus_size_t);
@ -220,7 +220,7 @@ struct bus_space {
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rr_8_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* write stream (single) */
void (*bs_w_1_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint8_t);
@ -240,7 +240,7 @@ struct bus_space {
bus_size_t, const uint32_t *, bus_size_t);
void (*bs_wm_8_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint64_t *, bus_size_t);
/* write region stream */
void (*bs_wr_1_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint8_t *, bus_size_t);
@ -335,10 +335,10 @@ __generate_inline_bs_rs(bus_space_read_2, bs_r_2, uint16_t);
__generate_inline_bs_rs(bus_space_read_4, bs_r_4, uint32_t);
__generate_inline_bs_rs(bus_space_read_8, bs_r_8, uint64_t);
__generate_inline_bs_rs(bus_space_read_stream_1, bs_r_1_s, uint8_t);
__generate_inline_bs_rs(bus_space_read_stream_2, bs_r_2_s, uint16_t);
__generate_inline_bs_rs(bus_space_read_stream_4, bs_r_4_s, uint32_t);
__generate_inline_bs_rs(bus_space_read_stream_8, bs_r_8_s, uint64_t);
__generate_inline_bs_rs(bus_space_read_stream_1, bs_r_1_s, uint8_t);
__generate_inline_bs_rs(bus_space_read_stream_2, bs_r_2_s, uint16_t);
__generate_inline_bs_rs(bus_space_read_stream_4, bs_r_4_s, uint32_t);
__generate_inline_bs_rs(bus_space_read_stream_8, bs_r_8_s, uint64_t);
/*
* Bus read multiple operations.
@ -392,10 +392,10 @@ __generate_inline_bs_ws(bus_space_write_2, bs_w_2, uint16_t);
__generate_inline_bs_ws(bus_space_write_4, bs_w_4, uint32_t);
__generate_inline_bs_ws(bus_space_write_8, bs_w_8, uint64_t);
__generate_inline_bs_ws(bus_space_write_stream_1, bs_w_1_s, uint8_t);
__generate_inline_bs_ws(bus_space_write_stream_2, bs_w_2_s, uint16_t);
__generate_inline_bs_ws(bus_space_write_stream_4, bs_w_4_s, uint32_t);
__generate_inline_bs_ws(bus_space_write_stream_8, bs_w_8_s, uint64_t);
__generate_inline_bs_ws(bus_space_write_stream_1, bs_w_1_s, uint8_t);
__generate_inline_bs_ws(bus_space_write_stream_2, bs_w_2_s, uint16_t);
__generate_inline_bs_ws(bus_space_write_stream_4, bs_w_4_s, uint32_t);
__generate_inline_bs_ws(bus_space_write_stream_8, bs_w_8_s, uint64_t);
/*
@ -581,7 +581,7 @@ void __bs_c(f,_bs_rm_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
#define bs_rm_4_proto(f) \
void __bs_c(f,_bs_rm_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint32_t *addr, bus_size_t count);
bus_size_t offset, uint32_t *addr, bus_size_t count);
#define bs_rm_8_proto(f) \
void __bs_c(f,_bs_rm_8) (bus_space_tag_t t, bus_space_handle_t bsh, \

12
sys/arm/include/cpufunc.h
View File

@ -59,7 +59,7 @@ breakpoint(void)
struct cpu_functions {
/* CPU functions */
u_int (*cf_id) (void);
void (*cf_cpwait) (void);
@ -73,12 +73,12 @@ struct cpu_functions {
/* TLB functions */
void (*cf_tlb_flushID) (void);
void (*cf_tlb_flushID_SE) (u_int va);
void (*cf_tlb_flushID) (void);
void (*cf_tlb_flushID_SE) (u_int va);
void (*cf_tlb_flushI) (void);
void (*cf_tlb_flushI_SE) (u_int va);
void (*cf_tlb_flushI_SE) (u_int va);
void (*cf_tlb_flushD) (void);
void (*cf_tlb_flushD_SE) (u_int va);
void (*cf_tlb_flushD_SE) (u_int va);
/*
* Cache operations:
@ -109,7 +109,7 @@ struct cpu_functions {
* It is used to intialize the MMU when it is in an unknown
* state (such as when it may have lines tagged as valid
* that belong to a previous set of mappings).
*
*
* I-cache Synch (all or range):
* The goal is to synchronize the instruction stream,
* so you may beed to write-back dirty D-cache blocks

2
sys/arm/include/devmap.h
View File

@ -70,7 +70,7 @@ void arm_devmap_register_table(const struct arm_devmap_entry * _table);
* custom initarm() routines in older code. If the table pointer is NULL, this
* will use the table installed previously by arm_devmap_register_table().
*/
void arm_devmap_bootstrap(vm_offset_t _l1pt,
void arm_devmap_bootstrap(vm_offset_t _l1pt,
const struct arm_devmap_entry *_table);
/*

2
sys/arm/include/disassem.h
View File

@ -42,7 +42,7 @@
#define _MACHINE_DISASSEM_H_
typedef struct {
u_int (*di_readword)(u_int);
void (*di_printaddr)(u_int);
void (*di_printaddr)(u_int);
int (*di_printf)(const char *, ...) __printflike(1, 2);
} disasm_interface_t;

6
sys/arm/include/endian.h
View File

@ -92,7 +92,7 @@ __bswap32_var(__uint32_t v)
"mov %0, %0, ror #8\n"
"eor %0, %0, %1, lsr #8\n"
: "+r" (v), "=r" (t1));
return (v);
}
@ -106,9 +106,9 @@ __bswap16_var(__uint16_t v)
"orr %0, %0, %0, lsr #16\n"
"bic %0, %0, %0, lsl #16"
: "+r" (ret));
return ((__uint16_t)ret);
}
}
#ifdef __OPTIMIZE__

2
sys/arm/include/pcb.h
View File

@ -62,7 +62,7 @@ struct pcb {
#endif
struct vfp_state pcb_vfpstate; /* VP/NEON state */
u_int pcb_vfpcpu; /* VP/NEON last cpu */
} __aligned(8); /*
} __aligned(8); /*
* We need the PCB to be aligned on 8 bytes, as we may
* access it using ldrd/strd, and ARM ABI require it
* to by aligned on 8 bytes.

2
sys/arm/include/pcpu.h
View File

@ -76,7 +76,7 @@ extern struct pcpu *pcpup;
(pcpup + (id & CPU_MASK)); \
})
#endif
static inline struct thread *
get_curthread(void)
{

6
sys/arm/include/physmem.h
View File

@ -65,7 +65,7 @@ void arm_physmem_print_tables(void);
#include <machine/ofw_machdep.h>
static inline void
static inline void
arm_physmem_hardware_regions(struct mem_region * mrptr, int mrcount)
{
while (mrcount--) {
@ -75,11 +75,11 @@ arm_physmem_hardware_regions(struct mem_region * mrptr, int mrcount)
}
static inline void
arm_physmem_exclude_regions(struct mem_region * mrptr, int mrcount,
arm_physmem_exclude_regions(struct mem_region * mrptr, int mrcount,
uint32_t exflags)
{
while (mrcount--) {
arm_physmem_exclude_region(mrptr->mr_start, mrptr->mr_size,
arm_physmem_exclude_region(mrptr->mr_start, mrptr->mr_size,
exflags);
++mrptr;
}

2
sys/arm/include/pl310.h
View File

@ -155,7 +155,7 @@ struct pl310_softc {
* pl310_write4 - write a 32-bit value from the PL310 registers
* @off: byte offset within the register set to read from
* @val: the value to write into the register
*
*
*
* LOCKING:
* None