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Move USB-specific parts from rtwn(4) to rtwn_usb(4)

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MFC after:	4 days
This commit is contained in:
Andriy Voskoboinyk 2019-01-02 05:30:41 +00:00
parent 17d5fbf21b
commit 4e4bcfcfb7
5 changed files with 96 additions and 84 deletions
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5
sys/dev/rtwn/rtl8188e/r88e.h
View File

@ -24,9 +24,7 @@
/*
* Global definitions.
*/
#define R88E_PUBQ_NPAGES 142
#define R88E_TXPKTBUF_COUNT 177
#define R88E_TX_PAGE_COUNT 169
#define R88E_MACID_MAX 63
#define R88E_RX_DMA_BUFFER_SIZE 0x2400
@ -67,9 +65,8 @@ int r88e_set_pwrmode(struct rtwn_softc *, struct ieee80211vap *, int);
#endif
/* r88e_init.c */
void r88e_init_bb(struct rtwn_softc *);
void r88e_init_bb_common(struct rtwn_softc *);
void r88e_init_rf(struct rtwn_softc *);
int r88e_power_on(struct rtwn_softc *);
/* r88e_led.c */
void r88e_set_led(struct rtwn_softc *, int, int);

77
sys/dev/rtwn/rtl8188e/r88e_init.c
View File

@ -70,20 +70,8 @@ r88e_crystalcap_write(struct rtwn_softc *sc)
}
void
r88e_init_bb(struct rtwn_softc *sc)
r88e_init_bb_common(struct rtwn_softc *sc)
{
/* Enable BB and RF. */
rtwn_setbits_2(sc, R92C_SYS_FUNC_EN, 0,
R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST |
R92C_SYS_FUNC_EN_DIO_RF);
rtwn_write_1(sc, R92C_RF_CTRL,
R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB);
rtwn_write_1(sc, R92C_SYS_FUNC_EN,
R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD |
R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB);
r92c_init_bb_common(sc);
rtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422);
@ -93,66 +81,3 @@ r88e_init_bb(struct rtwn_softc *sc)
r88e_crystalcap_write(sc);
}
int
r88e_power_on(struct rtwn_softc *sc)
{
#define RTWN_CHK(res) do { \
if (res != 0) \
return (EIO); \
} while(0)
int ntries;
/* Wait for power ready bit. */
for (ntries = 0; ntries < 5000; ntries++) {
if (rtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
break;
rtwn_delay(sc, 10);
}
if (ntries == 5000) {
device_printf(sc->sc_dev,
"timeout waiting for chip power up\n");
return (ETIMEDOUT);
}
/* Reset BB. */
RTWN_CHK(rtwn_setbits_1(sc, R92C_SYS_FUNC_EN,
R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST, 0));
RTWN_CHK(rtwn_setbits_1(sc, R92C_AFE_XTAL_CTRL + 2, 0, 0x80));
/* Disable HWPDN. */
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
R92C_APS_FSMCO_APDM_HPDN, 0, 1));
/* Disable WL suspend. */
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE, 0, 1));
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
0, R92C_APS_FSMCO_APFM_ONMAC, 1));
for (ntries = 0; ntries < 5000; ntries++) {
if (!(rtwn_read_2(sc, R92C_APS_FSMCO) &
R92C_APS_FSMCO_APFM_ONMAC))
break;
rtwn_delay(sc, 10);
}
if (ntries == 5000)
return (ETIMEDOUT);
/* Enable LDO normal mode. */
RTWN_CHK(rtwn_setbits_1(sc, R92C_LPLDO_CTRL,
R92C_LPLDO_CTRL_SLEEP, 0));
/* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */
RTWN_CHK(rtwn_write_2(sc, R92C_CR, 0));
RTWN_CHK(rtwn_setbits_2(sc, R92C_CR, 0,
R92C_CR_HCI_TXDMA_EN | R92C_CR_TXDMA_EN |
R92C_CR_HCI_RXDMA_EN | R92C_CR_RXDMA_EN |
R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN |
((sc->sc_hwcrypto != RTWN_CRYPTO_SW) ? R92C_CR_ENSEC : 0) |
R92C_CR_CALTMR_EN));
return (0);
#undef RTWN_CHK
}

9
sys/dev/rtwn/rtl8188e/usb/r88eu.h
View File

@ -24,10 +24,19 @@
#include <dev/rtwn/rtl8188e/r88e.h>
/*
* Global definitions.
*/
#define R88EU_PUBQ_NPAGES 142
#define R88EU_TX_PAGE_COUNT 169
/*
* Function declarations.
*/
/* r88eu_init.c */
void r88eu_init_bb(struct rtwn_softc *);
int r88eu_power_on(struct rtwn_softc *);
void r88eu_power_off(struct rtwn_softc *);
void r88eu_init_intr(struct rtwn_softc *);
void r88eu_init_rx_agg(struct rtwn_softc *);

8
sys/dev/rtwn/rtl8188e/usb/r88eu_attach.c
View File

@ -140,7 +140,7 @@ r88eu_attach(struct rtwn_usb_softc *uc)
sc->sc_efuse_postread = rtwn_nop_softc;
sc->sc_parse_rom = r88e_parse_rom;
sc->sc_set_led = r88e_set_led;
sc->sc_power_on = r88e_power_on;
sc->sc_power_on = r88eu_power_on;
sc->sc_power_off = r88eu_power_off;
#ifndef RTWN_WITHOUT_UCODE
sc->sc_fw_reset = r88e_fw_reset;
@ -172,7 +172,7 @@ r88eu_attach(struct rtwn_usb_softc *uc)
sc->sc_init_ampdu = rtwn_nop_softc;
sc->sc_init_intr = r88eu_init_intr;
sc->sc_init_edca = r92c_init_edca;
sc->sc_init_bb = r88e_init_bb;
sc->sc_init_bb = r88eu_init_bb;
sc->sc_init_rf = r92c_init_rf;
sc->sc_init_antsel = rtwn_nop_softc;
sc->sc_post_init = r88eu_post_init;
@ -190,11 +190,11 @@ r88eu_attach(struct rtwn_usb_softc *uc)
sc->fwname = "rtwn-rtl8188eufw";
sc->fwsig = 0x88e;
sc->page_count = R88E_TX_PAGE_COUNT;
sc->page_count = R88EU_TX_PAGE_COUNT;
sc->pktbuf_count = R88E_TXPKTBUF_COUNT;
sc->ackto = 0x40;
sc->npubqpages = R88E_PUBQ_NPAGES;
sc->npubqpages = R88EU_PUBQ_NPAGES;
sc->page_size = R92C_TX_PAGE_SIZE;
sc->txdesc_len = sizeof(struct r92cu_tx_desc);

81
sys/dev/rtwn/rtl8188e/usb/r88eu_init.c
View File

@ -54,6 +54,87 @@ __FBSDID("$FreeBSD$");
#include <dev/rtwn/rtl8188e/usb/r88eu_reg.h>
void
r88eu_init_bb(struct rtwn_softc *sc)
{
/* Enable BB and RF. */
rtwn_setbits_2(sc, R92C_SYS_FUNC_EN, 0,
R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST |
R92C_SYS_FUNC_EN_DIO_RF);
rtwn_write_1(sc, R92C_RF_CTRL,
R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB);
rtwn_write_1(sc, R92C_SYS_FUNC_EN,
R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD |
R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB);
r88e_init_bb_common(sc);
}
int
r88eu_power_on(struct rtwn_softc *sc)
{
#define RTWN_CHK(res) do { \
if (res != 0) \
return (EIO); \
} while(0)
int ntries;
/* Wait for power ready bit. */
for (ntries = 0; ntries < 5000; ntries++) {
if (rtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST)
break;
rtwn_delay(sc, 10);
}
if (ntries == 5000) {
device_printf(sc->sc_dev,
"timeout waiting for chip power up\n");
return (ETIMEDOUT);
}
/* Reset BB. */
RTWN_CHK(rtwn_setbits_1(sc, R92C_SYS_FUNC_EN,
R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST, 0));
RTWN_CHK(rtwn_setbits_1(sc, R92C_AFE_XTAL_CTRL + 2, 0, 0x80));
/* Disable HWPDN. */
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
R92C_APS_FSMCO_APDM_HPDN, 0, 1));
/* Disable WL suspend. */
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE, 0, 1));
RTWN_CHK(rtwn_setbits_1_shift(sc, R92C_APS_FSMCO,
0, R92C_APS_FSMCO_APFM_ONMAC, 1));
for (ntries = 0; ntries < 5000; ntries++) {
if (!(rtwn_read_2(sc, R92C_APS_FSMCO) &
R92C_APS_FSMCO_APFM_ONMAC))
break;
rtwn_delay(sc, 10);
}
if (ntries == 5000)
return (ETIMEDOUT);
/* Enable LDO normal mode. */
RTWN_CHK(rtwn_setbits_1(sc, R92C_LPLDO_CTRL,
R92C_LPLDO_CTRL_SLEEP, 0));
/* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */
RTWN_CHK(rtwn_write_2(sc, R92C_CR, 0));
RTWN_CHK(rtwn_setbits_2(sc, R92C_CR, 0,
R92C_CR_HCI_TXDMA_EN | R92C_CR_TXDMA_EN |
R92C_CR_HCI_RXDMA_EN | R92C_CR_RXDMA_EN |
R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN |
((sc->sc_hwcrypto != RTWN_CRYPTO_SW) ? R92C_CR_ENSEC : 0) |
R92C_CR_CALTMR_EN));
return (0);
#undef RTWN_CHK
}
void
r88eu_power_off(struct rtwn_softc *sc)
{