Sync with sys/i386/isa/clock.c revision 1.131.
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.65 1998/12/17 08:54:47 kato Exp $
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* $Id: clock.c,v 1.66 1999/01/28 11:36:22 kato Exp $
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*/
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/*
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@ -96,7 +96,7 @@
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#endif
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#include <i386/isa/timerreg.h>
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#include <sys/interrupt.h>
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#include <i386/isa/intr_machdep.h>
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#ifdef SMP
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#define disable_intr() CLOCK_DISABLE_INTR()
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@ -1286,6 +1286,7 @@ cpu_initclocks()
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{
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#ifdef APIC_IO
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int apic_8254_trial;
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struct intrec *clkdesc;
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#endif /* APIC_IO */
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#ifndef PC98
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int diag;
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@ -1323,16 +1324,14 @@ cpu_initclocks()
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panic("APIC_IO: Cannot route 8254 interrupt to CPU");
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}
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register_intr(/* irq */ apic_8254_intr, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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clkdesc = inthand_add("clk", apic_8254_intr, (inthand2_t *)clkintr,
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NULL, &clk_imask, INTR_EXCL);
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INTREN(1 << apic_8254_intr);
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#else /* APIC_IO */
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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inthand_add("clk", 0, (inthand2_t *)clkintr, NULL, &clk_imask,
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INTR_EXCL);
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INTREN(IRQ0);
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#endif /* APIC_IO */
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@ -1354,9 +1353,8 @@ cpu_initclocks()
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panic("APIC RTC != 8");
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#endif /* APIC_IO */
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register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0,
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/* XXX */ (inthand2_t *)rtcintr, &stat_imask,
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/* unit */ 0);
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inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL, &stat_imask,
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INTR_EXCL);
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#ifdef APIC_IO
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INTREN(APIC_IRQ8);
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@ -1381,17 +1379,15 @@ cpu_initclocks()
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* Workaround: Limited variant of mixed mode.
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*/
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INTRDIS(1 << apic_8254_intr);
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unregister_intr(apic_8254_intr,
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/* XXX */ (inthand2_t *) clkintr);
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inthand_remove(clkdesc);
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printf("APIC_IO: Broken MP table detected: "
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"8254 is not connected to IO APIC int pin %d\n",
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apic_8254_intr);
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apic_8254_intr = 0;
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setup_8254_mixed_mode();
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register_intr(/* irq */ apic_8254_intr, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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inthand_add("clk", apic_8254_intr,(inthand2_t *)clkintr,
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NULL, &clk_imask, INTR_EXCL);
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INTREN(1 << apic_8254_intr);
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}
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.65 1998/12/17 08:54:47 kato Exp $
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* $Id: clock.c,v 1.66 1999/01/28 11:36:22 kato Exp $
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*/
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/*
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@ -96,7 +96,7 @@
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#endif
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#include <i386/isa/timerreg.h>
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#include <sys/interrupt.h>
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#include <i386/isa/intr_machdep.h>
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#ifdef SMP
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#define disable_intr() CLOCK_DISABLE_INTR()
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@ -1286,6 +1286,7 @@ cpu_initclocks()
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{
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#ifdef APIC_IO
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int apic_8254_trial;
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struct intrec *clkdesc;
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#endif /* APIC_IO */
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#ifndef PC98
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int diag;
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@ -1323,16 +1324,14 @@ cpu_initclocks()
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panic("APIC_IO: Cannot route 8254 interrupt to CPU");
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}
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register_intr(/* irq */ apic_8254_intr, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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clkdesc = inthand_add("clk", apic_8254_intr, (inthand2_t *)clkintr,
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NULL, &clk_imask, INTR_EXCL);
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INTREN(1 << apic_8254_intr);
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#else /* APIC_IO */
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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inthand_add("clk", 0, (inthand2_t *)clkintr, NULL, &clk_imask,
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INTR_EXCL);
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INTREN(IRQ0);
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#endif /* APIC_IO */
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@ -1354,9 +1353,8 @@ cpu_initclocks()
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panic("APIC RTC != 8");
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#endif /* APIC_IO */
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register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0,
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/* XXX */ (inthand2_t *)rtcintr, &stat_imask,
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/* unit */ 0);
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inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL, &stat_imask,
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INTR_EXCL);
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#ifdef APIC_IO
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INTREN(APIC_IRQ8);
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@ -1381,17 +1379,15 @@ cpu_initclocks()
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* Workaround: Limited variant of mixed mode.
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*/
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INTRDIS(1 << apic_8254_intr);
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unregister_intr(apic_8254_intr,
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/* XXX */ (inthand2_t *) clkintr);
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inthand_remove(clkdesc);
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printf("APIC_IO: Broken MP table detected: "
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"8254 is not connected to IO APIC int pin %d\n",
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apic_8254_intr);
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apic_8254_intr = 0;
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setup_8254_mixed_mode();
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register_intr(/* irq */ apic_8254_intr, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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inthand_add("clk", apic_8254_intr,(inthand2_t *)clkintr,
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NULL, &clk_imask, INTR_EXCL);
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INTREN(1 << apic_8254_intr);
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}
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.65 1998/12/17 08:54:47 kato Exp $
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* $Id: clock.c,v 1.66 1999/01/28 11:36:22 kato Exp $
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*/
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/*
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@ -96,7 +96,7 @@
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#endif
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#include <i386/isa/timerreg.h>
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#include <sys/interrupt.h>
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#include <i386/isa/intr_machdep.h>
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#ifdef SMP
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#define disable_intr() CLOCK_DISABLE_INTR()
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@ -1286,6 +1286,7 @@ cpu_initclocks()
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{
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#ifdef APIC_IO
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int apic_8254_trial;
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struct intrec *clkdesc;
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#endif /* APIC_IO */
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#ifndef PC98
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int diag;
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@ -1323,16 +1324,14 @@ cpu_initclocks()
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panic("APIC_IO: Cannot route 8254 interrupt to CPU");
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}
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register_intr(/* irq */ apic_8254_intr, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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clkdesc = inthand_add("clk", apic_8254_intr, (inthand2_t *)clkintr,
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NULL, &clk_imask, INTR_EXCL);
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INTREN(1 << apic_8254_intr);
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#else /* APIC_IO */
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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inthand_add("clk", 0, (inthand2_t *)clkintr, NULL, &clk_imask,
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INTR_EXCL);
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INTREN(IRQ0);
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#endif /* APIC_IO */
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@ -1354,9 +1353,8 @@ cpu_initclocks()
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panic("APIC RTC != 8");
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#endif /* APIC_IO */
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register_intr(/* irq */ 8, /* XXX id */ 1, /* flags */ 0,
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/* XXX */ (inthand2_t *)rtcintr, &stat_imask,
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/* unit */ 0);
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inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL, &stat_imask,
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INTR_EXCL);
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#ifdef APIC_IO
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INTREN(APIC_IRQ8);
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@ -1381,17 +1379,15 @@ cpu_initclocks()
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* Workaround: Limited variant of mixed mode.
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*/
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INTRDIS(1 << apic_8254_intr);
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unregister_intr(apic_8254_intr,
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/* XXX */ (inthand2_t *) clkintr);
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inthand_remove(clkdesc);
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printf("APIC_IO: Broken MP table detected: "
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"8254 is not connected to IO APIC int pin %d\n",
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apic_8254_intr);
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apic_8254_intr = 0;
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setup_8254_mixed_mode();
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register_intr(/* irq */ apic_8254_intr, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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inthand_add("clk", apic_8254_intr,(inthand2_t *)clkintr,
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NULL, &clk_imask, INTR_EXCL);
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INTREN(1 << apic_8254_intr);
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}
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