From 4fa0803f2495124103bce06dabee155eb91bfc32 Mon Sep 17 00:00:00 2001
From: sos <sos@FreeBSD.org>
Date: Thu, 9 Jun 2005 21:13:44 +0000
Subject: [PATCH] Fix the long standing problem with poor transferrates on
 Intel ICHH type chips. The DMA timing value was set on device 0 for all
 devices :/

Prodded by: Harald Schmalzbauer
---
 sys/dev/ata/ata-chipset.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/sys/dev/ata/ata-chipset.c b/sys/dev/ata/ata-chipset.c
index 18d6859caea8..8325a5d829cd 100644
--- a/sys/dev/ata/ata-chipset.c
+++ b/sys/dev/ata/ata-chipset.c
@@ -1740,8 +1740,9 @@ ata_intel_new_setmode(device_t dev, int mode)
 
     if (mode >= ATA_UDMA0) {
 	pci_write_config(gparent, 0x48, reg48 | (0x0001 << devno), 2);
-	pci_write_config(gparent, 0x4a, (reg4a & ~(0x3 << (devno<<2))) | 
-				       (0x01 + !(mode & 0x01)), 2);
+	pci_write_config(gparent, 0x4a,
+			 (reg4a & ~(0x3 << (devno << 2))) |
+			 ((0x01 + !(mode & 0x01)) << (devno << 2)), 2);
     }
     else {
 	pci_write_config(gparent, 0x48, reg48 & ~(0x0001 << devno), 2);