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Convert sk(4) to use the new bus_alloc_resources() API and

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bus_{read,write}_* macros.

Submitted by:	Antoine Brodin <antoine.brodin AT laposte DOT net>
Reviewed by:	imp (initial version)
This commit is contained in:
yongari 2006-07-19 04:12:59 +00:00
parent ee0a5eb928
commit 50e3fae196
2 changed files with 43 additions and 46 deletions
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69
sys/dev/sk/if_sk.c
View File

@ -278,14 +278,6 @@ static void sk_setpromisc(struct sk_if_softc *);
static int sysctl_int_range(SYSCTL_HANDLER_ARGS, int low, int high);
static int sysctl_hw_sk_int_mod(SYSCTL_HANDLER_ARGS);
#ifdef SK_USEIOSPACE
#define SK_RES SYS_RES_IOPORT
#define SK_RID SK_PCI_LOIO
#else
#define SK_RES SYS_RES_MEMORY
#define SK_RID SK_PCI_LOMEM
#endif
/*
* It seems that SK-NET GENESIS supports very simple checksum offload
* capability for Tx and I believe it can generate 0 checksum value for
@ -361,6 +353,18 @@ DRIVER_MODULE(skc, pci, skc_driver, skc_devclass, 0, 0);
DRIVER_MODULE(sk, skc, sk_driver, sk_devclass, 0, 0);
DRIVER_MODULE(miibus, sk, miibus_driver, miibus_devclass, 0, 0);
static struct resource_spec sk_res_spec_io[] = {
{ SYS_RES_IOPORT, PCIR_BAR(1), RF_ACTIVE },
{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
{ -1, 0, 0 }
};
static struct resource_spec sk_res_spec_mem[] = {
{ SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE },
{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
{ -1, 0, 0 }
};
#define SK_SETBIT(sc, reg, x) \
CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | x)
@ -1681,7 +1685,7 @@ skc_attach(dev)
device_t dev;
{
struct sk_softc *sc;
int error = 0, rid, *port, sk_macs;
int error = 0, *port, sk_macs;
uint8_t skrs;
char *pname, *revstr;
@ -1696,17 +1700,26 @@ skc_attach(dev)
*/
pci_enable_busmaster(dev);
rid = SK_RID;
sc->sk_res = bus_alloc_resource_any(dev, SK_RES, &rid, RF_ACTIVE);
if (sc->sk_res == NULL) {
device_printf(dev, "couldn't map ports/memory\n");
error = ENXIO;
/* Allocate resources */
#ifdef SK_USEIOSPACE
sc->sk_res_spec = sk_res_spec_io;
#else
sc->sk_res_spec = sk_res_spec_mem;
#endif
error = bus_alloc_resources(dev, sc->sk_res_spec, sc->sk_res);
if (error) {
if (sc->sk_res_spec == sk_res_spec_mem)
sc->sk_res_spec = sk_res_spec_io;
else
sc->sk_res_spec = sk_res_spec_mem;
error = bus_alloc_resources(dev, sc->sk_res_spec, sc->sk_res);
if (error) {
device_printf(dev, "couldn't allocate %s resources\n",
sc->sk_res_spec == sk_res_spec_mem ? "memory" :
"I/O");
goto fail;
}
sc->sk_btag = rman_get_bustag(sc->sk_res);
sc->sk_bhandle = rman_get_bushandle(sc->sk_res);
}
sc->sk_type = sk_win_read_1(sc, SK_CHIPVER);
sc->sk_rev = (sk_win_read_1(sc, SK_CONFIG) >> 4) & 0xf;
@ -1719,17 +1732,6 @@ skc_attach(dev)
goto fail;
}
/* Allocate interrupt */
rid = 0;
sc->sk_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
RF_SHAREABLE | RF_ACTIVE);
if (sc->sk_irq == NULL) {
device_printf(dev, "couldn't map interrupt\n");
error = ENXIO;
goto fail;
}
SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
OID_AUTO, "int_mod", CTLTYPE_INT|CTLFLAG_RW,
@ -1995,7 +1997,7 @@ skc_attach(dev)
}
/* Hook interrupt last to avoid having to lock softc */
error = bus_setup_intr(dev, sc->sk_irq, INTR_TYPE_NET|INTR_MPSAFE,
error = bus_setup_intr(dev, sc->sk_res[1], INTR_TYPE_NET|INTR_MPSAFE,
sk_intr, sc, &sc->sk_intrhand);
if (error) {
@ -2084,11 +2086,8 @@ skc_detach(dev)
free(sc->sk_vpd_readonly, M_DEVBUF);
if (sc->sk_intrhand)
bus_teardown_intr(dev, sc->sk_irq, sc->sk_intrhand);
if (sc->sk_irq)
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sk_irq);
if (sc->sk_res)
bus_release_resource(dev, SK_RES, SK_RID, sc->sk_res);
bus_teardown_intr(dev, sc->sk_res[1], sc->sk_intrhand);
bus_release_resources(dev, sc->sk_res_spec, sc->sk_res);
mtx_destroy(&sc->sk_mii_mtx);
mtx_destroy(&sc->sk_mtx);

18
sys/dev/sk/if_skreg.h
View File

@ -1327,18 +1327,18 @@ struct vpd_key {
#define VPD_RES_END 0x78 /* end tag */
#define CSR_WRITE_4(sc, reg, val) \
bus_space_write_4((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))
bus_write_4((sc)->sk_res[0], (reg), (val))
#define CSR_WRITE_2(sc, reg, val) \
bus_space_write_2((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))
bus_write_2((sc)->sk_res[0], (reg), (val))
#define CSR_WRITE_1(sc, reg, val) \
bus_space_write_1((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))
bus_write_1((sc)->sk_res[0], (reg), (val))
#define CSR_READ_4(sc, reg) \
bus_space_read_4((sc)->sk_btag, (sc)->sk_bhandle, (reg))
bus_read_4((sc)->sk_res[0], (reg))
#define CSR_READ_2(sc, reg) \
bus_space_read_2((sc)->sk_btag, (sc)->sk_bhandle, (reg))
bus_read_2((sc)->sk_res[0], (reg))
#define CSR_READ_1(sc, reg) \
bus_space_read_1((sc)->sk_btag, (sc)->sk_bhandle, (reg))
bus_read_1((sc)->sk_res[0], (reg))
struct sk_type {
u_int16_t sk_vid;
@ -1520,11 +1520,9 @@ struct sk_if_softc;
/* Softc for the GEnesis controller. */
struct sk_softc {
bus_space_handle_t sk_bhandle; /* bus space handle */
bus_space_tag_t sk_btag; /* bus space tag */
struct resource *sk_res[2]; /* I/O and IRQ resources */
struct resource_spec *sk_res_spec;
void *sk_intrhand; /* irq handler handle */
struct resource *sk_irq; /* IRQ resource handle */
struct resource *sk_res; /* I/O or shared mem handle */
device_t sk_dev;
u_int8_t sk_type;
u_int8_t sk_rev;