- Switching the mode of Ricoh R5CE823 to SD2.0 causes their PCI device ID
to change to 0xe822, which may be persistent across reboots and, thus, confuse other OSes. Therefore, restore the original mode and frequency setting on detach and shutdown. - Report Ricoh R5CE822 as such. - According to Linux, Ricoh R5CE822 also need SDHCI_QUIRK_LOWER_FREQUENCY. - Nuke an unused softc member. MFC after: 3 days
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@ -71,7 +71,7 @@ __FBSDID("$FreeBSD$");
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*/
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#define SDHC_PCI_MODE_KEY 0xf9
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#define SDHC_PCI_MODE 0x150
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#define SDHC_PCI_MODE_SD20 0x10
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#define SDHC_PCI_MODE_SD20 0x10
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#define SDHC_PCI_BASE_FREQ_KEY 0xfc
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#define SDHC_PCI_BASE_FREQ 0xe1
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@ -83,8 +83,9 @@ static const struct sdhci_device {
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} sdhci_devices[] = {
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{ 0x08221180, 0xffff, "RICOH R5C822 SD",
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SDHCI_QUIRK_FORCE_DMA },
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{ 0xe8221180, 0xffff, "RICOH SD",
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SDHCI_QUIRK_FORCE_DMA },
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{ 0xe8221180, 0xffff, "RICOH R5CE822 SD",
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SDHCI_QUIRK_FORCE_DMA |
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SDHCI_QUIRK_LOWER_FREQUENCY },
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{ 0xe8231180, 0xffff, "RICOH R5CE823 SD",
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SDHCI_QUIRK_LOWER_FREQUENCY },
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{ 0x8034104c, 0xffff, "TI XX21/XX11 SD",
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@ -109,7 +110,6 @@ static const struct sdhci_device {
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};
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struct sdhci_pci_softc {
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device_t dev; /* Controller device */
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u_int quirks; /* Chip specific quirks */
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struct resource *irq_res; /* IRQ resource */
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void *intrhand; /* Interrupt handle */
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@ -117,6 +117,8 @@ struct sdhci_pci_softc {
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int num_slots; /* Number of slots on this controller */
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struct sdhci_slot slots[6];
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struct resource *mem_res[6]; /* Memory resource */
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uint8_t cfg_freq; /* Saved mode */
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uint8_t cfg_mode; /* Saved frequency */
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};
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static int sdhci_enable_msi = 1;
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@ -206,21 +208,43 @@ static void sdhci_pci_intr(void *arg);
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static void
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sdhci_lower_frequency(device_t dev)
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{
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struct sdhci_pci_softc *sc = device_get_softc(dev);
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/* Enable SD2.0 mode. */
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/*
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* Enable SD2.0 mode.
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* NB: for RICOH R5CE823, this changes the PCI device ID to 0xe822.
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*/
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pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1);
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sc->cfg_mode = pci_read_config(dev, SDHC_PCI_MODE, 1);
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pci_write_config(dev, SDHC_PCI_MODE, SDHC_PCI_MODE_SD20, 1);
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pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1);
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/*
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* Some SD/MMC cards don't work with the default base
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* clock frequency of 200MHz. Lower it to 50Hz.
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* clock frequency of 200 MHz. Lower it to 50 MHz.
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*/
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pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1);
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sc->cfg_freq = pci_read_config(dev, SDHC_PCI_BASE_FREQ, 1);
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pci_write_config(dev, SDHC_PCI_BASE_FREQ, 50, 1);
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pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x00, 1);
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}
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static void
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sdhci_restore_frequency(device_t dev)
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{
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struct sdhci_pci_softc *sc = device_get_softc(dev);
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/* Restore mode. */
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pci_write_config(dev, SDHC_PCI_MODE_KEY, 0xfc, 1);
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pci_write_config(dev, SDHC_PCI_MODE, sc->cfg_mode, 1);
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pci_write_config(dev, SDHC_PCI_MODE_KEY, 0x00, 1);
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/* Restore frequency. */
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pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x01, 1);
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pci_write_config(dev, SDHC_PCI_BASE_FREQ, sc->cfg_freq, 1);
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pci_write_config(dev, SDHC_PCI_BASE_FREQ_KEY, 0x00, 1);
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}
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static int
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sdhci_pci_probe(device_t dev)
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{
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@ -262,7 +286,6 @@ sdhci_pci_attach(device_t dev)
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uint16_t subvendor;
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int bar, err, rid, slots, i;
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sc->dev = dev;
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model = (uint32_t)pci_get_device(dev) << 16;
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model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
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subvendor = pci_get_subvendor(dev);
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@ -352,6 +375,18 @@ sdhci_pci_detach(device_t dev)
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bus_release_resource(dev, SYS_RES_MEMORY,
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rman_get_rid(sc->mem_res[i]), sc->mem_res[i]);
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}
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if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY)
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sdhci_restore_frequency(dev);
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return (0);
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}
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static int
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sdhci_pci_shutdown(device_t dev)
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{
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struct sdhci_pci_softc *sc = device_get_softc(dev);
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if (sc->quirks & SDHCI_QUIRK_LOWER_FREQUENCY)
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sdhci_restore_frequency(dev);
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return (0);
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}
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@ -397,6 +432,7 @@ static device_method_t sdhci_methods[] = {
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DEVMETHOD(device_probe, sdhci_pci_probe),
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DEVMETHOD(device_attach, sdhci_pci_attach),
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DEVMETHOD(device_detach, sdhci_pci_detach),
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DEVMETHOD(device_shutdown, sdhci_pci_shutdown),
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DEVMETHOD(device_suspend, sdhci_pci_suspend),
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DEVMETHOD(device_resume, sdhci_pci_resume),
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