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Reduce the DWC OTG interrupt load by not reading all the host channel

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status registers for every interrupt. Check a common host channel
status interrupt register first, then conditionally read the
individual host channel status registers.

Submitted by:	Sebastian Huber <sebastian.huber@embedded-brains.de>
MFC after:	1 week
This commit is contained in:
Hans Petter Selasky 2015-10-30 14:50:29 +00:00
parent bf1be54f54
commit 52d7c63839
1 changed files with 11 additions and 6 deletions
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17
sys/dev/usb/controller/dwc_otg.c
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@ -2558,6 +2558,7 @@ dwc_otg_interrupt_poll_locked(struct dwc_otg_softc *sc)
struct usb_xfer *xfer;
uint32_t count;
uint32_t temp;
uint32_t haint;
uint8_t got_rx_status;
uint8_t x;
@ -2575,14 +2576,18 @@ dwc_otg_interrupt_poll_locked(struct dwc_otg_softc *sc)
DPRINTF("Yield\n");
return;
}
/* get all host channel interrupts */
for (x = 0; x != sc->sc_host_ch_max; x++) {
haint = DWC_OTG_READ_4(sc, DOTG_HAINT);
while (1) {
x = ffs(haint) - 1;
if (x >= sc->sc_host_ch_max)
break;
temp = DWC_OTG_READ_4(sc, DOTG_HCINT(x));
if (temp != 0) {
DWC_OTG_WRITE_4(sc, DOTG_HCINT(x), temp);
temp &= ~HCINT_SOFTWARE_ONLY;
sc->sc_chan_state[x].hcint |= temp;
}
DWC_OTG_WRITE_4(sc, DOTG_HCINT(x), temp);
temp &= ~HCINT_SOFTWARE_ONLY;
sc->sc_chan_state[x].hcint |= temp;
haint &= ~(1U << x);
}
if (sc->sc_last_rx_status == 0) {