Add hypervisor trap handling, using HSRR0/HSRR1
Summary: Some hypervisor exceptions on POWER architecture only save state to HSRR0/HSRR1. Until we have bhyve on POWER, use a lightweight exception frontend which copies HSRR0/HSRR1 into SRR0/SRR1, and run the normal trap handler. The first user of this is the Hypervisor Virtualization Interrupt, which targets the XIVE interrupt controller on POWER9. Reviewed By: nwhitehorn Differential Revision: https://reviews.freebsd.org/D15487
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@ -148,6 +148,7 @@ extern Elf_Addr _GLOBAL_OFFSET_TABLE_[];
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extern void *rstcode, *rstcodeend;
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extern void *trapcode, *trapcodeend;
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extern void *hypertrapcode, *hypertrapcodeend;
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extern void *generictrap, *generictrap64;
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extern void *alitrap, *aliend;
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extern void *dsitrap, *dsiend;
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@ -360,6 +361,11 @@ aim_cpu_init(vm_offset_t toc)
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bcopy(&restorebridge, (void *)EXC_TRC, trap_offset);
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bcopy(&restorebridge, (void *)EXC_BPT, trap_offset);
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}
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#else
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trapsize = (size_t)&hypertrapcodeend - (size_t)&hypertrapcode;
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bcopy(&hypertrapcode, (void *)(EXC_HEA + trap_offset), trapsize);
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bcopy(&hypertrapcode, (void *)(EXC_HMI + trap_offset), trapsize);
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bcopy(&hypertrapcode, (void *)(EXC_HVI + trap_offset), trapsize);
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#endif
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bcopy(&rstcode, (void *)(EXC_RST + trap_offset), (size_t)&rstcodeend -
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@ -446,6 +446,20 @@ CNAME(trapcode):
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blrl /* Branch to generictrap */
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CNAME(trapcodeend):
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/* Same thing for traps setting HSRR0/HSS1 */
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.globl CNAME(hypertrapcode),CNAME(hypertrapcodeend)
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.p2align 3
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CNAME(hypertrapcode):
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mtsprg1 %r1 /* save SP */
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mflr %r1 /* Save the old LR in r1 */
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mtsprg2 %r1 /* And then in SPRG2 */
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ld %r1,TRAP_GENTRAP(0)
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addi %r1,%r1,(generichypertrap-generictrap)
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mtlr %r1
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li %r1, 0xe0 /* How to get the vector from LR */
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blrl /* Branch to generictrap */
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CNAME(hypertrapcodeend):
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/*
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* For SLB misses: do special things for the kernel
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*
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@ -757,6 +771,13 @@ realtrap:
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* SPRG2 - Original LR
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*/
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generichypertrap:
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mtsprg3 %r1
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mfspr %r1, SPR_HSRR0
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mtsrr0 %r1
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mfspr %r1, SPR_HSRR1
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mtsrr1 %r1
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mfsprg3 %r1
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.globl CNAME(generictrap)
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generictrap:
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/* Save R1 for computing the exception vector */
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@ -86,6 +86,7 @@ powerpc_interrupt(struct trapframe *framep)
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switch (framep->exc) {
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case EXC_EXI:
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case EXC_HVI:
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critical_enter();
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PIC_DISPATCH(root_pic, framep);
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critical_exit();
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