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Have the driver advertise that it is capable of hardware checksums, and

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allow the user to control the setting.  (checksums are enabled by default)
This commit is contained in:
Jonathan Lemon 2001-09-18 18:40:22 +00:00
parent 976a26437e
commit 53de2fb09f
2 changed files with 38 additions and 4 deletions
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21
sys/dev/ti/if_ti.c
View File

@ -1132,7 +1132,10 @@ static int ti_chipinit(sc)
/* Initialize link to down state. */
sc->ti_linkstat = TI_EV_CODE_LINK_DOWN;
sc->arpcom.ac_if.if_hwassist = TI_CSUM_FEATURES;
if (sc->arpcom.ac_if.if_capenable & IFCAP_HWCSUM)
sc->arpcom.ac_if.if_hwassist = TI_CSUM_FEATURES;
else
sc->arpcom.ac_if.if_hwassist = 0;
/* Set endianness before we access any non-PCI registers. */
#if BYTE_ORDER == BIG_ENDIAN
@ -1464,6 +1467,8 @@ static int ti_attach(dev)
mtx_init(&sc->ti_mtx, device_get_nameunit(dev), MTX_DEF | MTX_RECURSE);
TI_LOCK(sc);
sc->arpcom.ac_if.if_capabilities = IFCAP_HWCSUM;
sc->arpcom.ac_if.if_capenable = sc->arpcom.ac_if.if_capabilities;
/*
* Map control/status registers.
@ -2329,7 +2334,7 @@ static int ti_ioctl(ifp, command, data)
{
struct ti_softc *sc = ifp->if_softc;
struct ifreq *ifr = (struct ifreq *) data;
int error = 0;
int mask, error = 0;
struct ti_cmd_desc cmd;
TI_LOCK(sc);
@ -2388,6 +2393,18 @@ static int ti_ioctl(ifp, command, data)
case SIOCGIFMEDIA:
error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command);
break;
case SIOCSIFCAP:
mask = ifr->ifr_reqcap ^ ifp->if_capenable;
if (mask & IFCAP_HWCSUM) {
if (IFCAP_HWCSUM & ifp->if_capenable)
ifp->if_capenable &= ~IFCAP_HWCSUM;
else
ifp->if_capenable |= IFCAP_HWCSUM;
if (ifp->if_flags & IFF_RUNNING)
ti_init(sc);
}
error = 0;
break;
default:
error = EINVAL;
break;

21
sys/pci/if_ti.c
View File

@ -1132,7 +1132,10 @@ static int ti_chipinit(sc)
/* Initialize link to down state. */
sc->ti_linkstat = TI_EV_CODE_LINK_DOWN;
sc->arpcom.ac_if.if_hwassist = TI_CSUM_FEATURES;
if (sc->arpcom.ac_if.if_capenable & IFCAP_HWCSUM)
sc->arpcom.ac_if.if_hwassist = TI_CSUM_FEATURES;
else
sc->arpcom.ac_if.if_hwassist = 0;
/* Set endianness before we access any non-PCI registers. */
#if BYTE_ORDER == BIG_ENDIAN
@ -1464,6 +1467,8 @@ static int ti_attach(dev)
mtx_init(&sc->ti_mtx, device_get_nameunit(dev), MTX_DEF | MTX_RECURSE);
TI_LOCK(sc);
sc->arpcom.ac_if.if_capabilities = IFCAP_HWCSUM;
sc->arpcom.ac_if.if_capenable = sc->arpcom.ac_if.if_capabilities;
/*
* Map control/status registers.
@ -2329,7 +2334,7 @@ static int ti_ioctl(ifp, command, data)
{
struct ti_softc *sc = ifp->if_softc;
struct ifreq *ifr = (struct ifreq *) data;
int error = 0;
int mask, error = 0;
struct ti_cmd_desc cmd;
TI_LOCK(sc);
@ -2388,6 +2393,18 @@ static int ti_ioctl(ifp, command, data)
case SIOCGIFMEDIA:
error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command);
break;
case SIOCSIFCAP:
mask = ifr->ifr_reqcap ^ ifp->if_capenable;
if (mask & IFCAP_HWCSUM) {
if (IFCAP_HWCSUM & ifp->if_capenable)
ifp->if_capenable &= ~IFCAP_HWCSUM;
else
ifp->if_capenable |= IFCAP_HWCSUM;
if (ifp->if_flags & IFF_RUNNING)
ti_init(sc);
}
error = 0;
break;
default:
error = EINVAL;
break;