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Fix a typo in r1.8: The GTLB enable/flush bit is 1<<7, not 1<<8.

Browse Source 
PR:		kern/56297
Submitted by:	Dan Angelescu <mrhsaacdoh@yahoo.com>
This commit is contained in:
anholt 2003-09-17 02:58:17 +00:00
parent 96dbeb7199
commit 54afaf4eff
2 changed files with 2 additions and 2 deletions
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2
sys/dev/agp/agp_intel.c
View File

@ -373,7 +373,7 @@ agp_intel_flush_tlb(device_t dev)
u_int32_t val;
val = pci_read_config(dev, AGP_INTEL_AGPCTRL, 4);
pci_write_config(dev, AGP_INTEL_AGPCTRL, val & ~(1 << 8), 4);
pci_write_config(dev, AGP_INTEL_AGPCTRL, val & ~(1 << 7), 4);
pci_write_config(dev, AGP_INTEL_AGPCTRL, val, 4);
}

2
sys/pci/agp_intel.c
View File

@ -373,7 +373,7 @@ agp_intel_flush_tlb(device_t dev)
u_int32_t val;
val = pci_read_config(dev, AGP_INTEL_AGPCTRL, 4);
pci_write_config(dev, AGP_INTEL_AGPCTRL, val & ~(1 << 8), 4);
pci_write_config(dev, AGP_INTEL_AGPCTRL, val & ~(1 << 7), 4);
pci_write_config(dev, AGP_INTEL_AGPCTRL, val, 4);
}