A number of small fixes:

- duplicate #define in header, thanks to Kevin Lo for pointing out.
	- incorrect BUSMASTER enable logic, thanks Patrick Oeschger
	- 82543 fails due to bogus IO BAR logic
	- Allow 82571 to use MSI interrupts
	- Checksum Offload for UDP not working on 82575

Approved by:re
This commit is contained in:
jfv 2007-09-10 21:50:40 +00:00
parent 8696d874ba
commit 54ec29e11d
2 changed files with 5 additions and 6 deletions

View File

@ -2450,8 +2450,8 @@ em_identify_hardware(struct adapter *adapter)
/* Make sure our PCI config space has the necessary stuff set */
adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
if ((adapter->hw.bus.pci_cmd_word & PCIM_CMD_BUSMASTEREN) == 0 &&
(adapter->hw.bus.pci_cmd_word & PCIM_CMD_MEMEN)) {
if (!((adapter->hw.bus.pci_cmd_word & PCIM_CMD_BUSMASTEREN) &&
(adapter->hw.bus.pci_cmd_word & PCIM_CMD_MEMEN))) {
device_printf(dev, "Memory Access and/or Bus Master bits "
"were not set!\n");
adapter->hw.bus.pci_cmd_word |=
@ -2495,7 +2495,7 @@ em_allocate_pci_resources(struct adapter *adapter)
adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
/* Only older adapters use IO mapping */
if ((adapter->hw.mac.type > e1000_82542) &&
if ((adapter->hw.mac.type > e1000_82543) &&
(adapter->hw.mac.type < e1000_82571)) {
/* Figure our where our IO BAR is ? */
for (rid = PCIR_BAR(0); rid < PCIR_CIS;) {
@ -2557,7 +2557,7 @@ em_allocate_pci_resources(struct adapter *adapter)
rid = 1;
adapter->msi = 1;
}
} else if (adapter->hw.mac.type > e1000_82571) {
} else if (adapter->hw.mac.type >= e1000_82571) {
val = pci_msi_count(dev);
if (val == 1 && pci_alloc_msi(dev, &val) == 0) {
rid = 1;
@ -3698,7 +3698,7 @@ em_tx_adv_ctx_setup(struct adapter *adapter, struct mbuf *mp)
break;
case IPPROTO_UDP:
if (mp->m_pkthdr.csum_flags & CSUM_UDP)
type_tucmd_mlhl |= E1000_ADVTXD_TUCMD_L4T_TCP;
type_tucmd_mlhl |= E1000_ADVTXD_TUCMD_L4T_UDP;
break;
}

View File

@ -181,7 +181,6 @@ POSSIBILITY OF SUCH DAMAGE.
#define EM_SMARTSPEED_DOWNSHIFT 3
#define EM_SMARTSPEED_MAX 15
#define EM_MAX_INTR 10
#define EM_TSO_SEG_SIZE 4096 /* Max dma seg size */
#define MAX_NUM_MULTICAST_ADDRESSES 128
#define PCI_ANY_ID (~0U)