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Probe Intel Denverton eMMC 5.0 controllers.

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This commit is contained in:
Marius Strobl 2017-12-28 22:03:08 +00:00
parent 15f0034553
commit 54ef33c2a8
1 changed files with 6 additions and 0 deletions
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6
sys/dev/sdhci/sdhci_pci.c
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@ -122,6 +122,12 @@ static const struct sdhci_device {
SDHCI_QUIRK_MMC_DDR52 |
SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
SDHCI_QUIRK_PRESET_VALUE_BROKEN },
{ 0x19db8086, 0xffff, "Intel Denverton eMMC 5.0 Controller",
SDHCI_QUIRK_INTEL_POWER_UP_RESET |
SDHCI_QUIRK_WAIT_WHILE_BUSY |
SDHCI_QUIRK_MMC_DDR52 |
SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
SDHCI_QUIRK_PRESET_VALUE_BROKEN },
{ 0x22948086, 0xffff, "Intel Braswell eMMC 4.5.1 Controller",
SDHCI_QUIRK_DATA_TIMEOUT_1MHZ |
SDHCI_QUIRK_INTEL_POWER_UP_RESET |