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fix-up for configuration of AMD Family 10h processors borrowed from Linux

Browse Source 
http://lxr.free-electrons.com/source/arch/x86/kernel/cpu/amd.c#L643
BIOS may configure Family 10h processors to convert WC+ cache type
to CD.  That can hurt performance of guest VMs using nested paging.

Reviewed by:	kib
MFC after:	3 weeks
Differential Revision: https://reviews.freebsd.org/D6059
This commit is contained in:
avg 2016-07-14 11:03:05 +00:00
parent c38a06b1d6
commit 555e531ac1
1 changed files with 15 additions and 0 deletions
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15
sys/amd64/amd64/initcpu.c
View File

@ -94,6 +94,20 @@ init_amd(void)
wrmsr(MSR_NB_CFG1, msr);
}
}
/*
* BIOS may configure Family 10h processors to convert WC+ cache type
* to CD. That can hurt performance of guest VMs using nested paging.
* The relevant MSR bit is not documented in the BKDG,
* the fix is borrowed from Linux.
*/
if (CPUID_TO_FAMILY(cpu_id) == 0x10) {
if ((cpu_feature2 & CPUID2_HV) == 0) {
msr = rdmsr(0xc001102a);
msr &= ~((uint64_t)1 << 24);
wrmsr(0xc001102a, msr);
}
}
}
/*
@ -179,6 +193,7 @@ initializecpu(void)
void
initializecpucache(void)
{
uint64_t msr;
/*
* CPUID with %eax = 1, %ebx returns