bhyve(8): Fix uart emulation bug

THRE is always asserted in LSR reads, so REG_IER writes that raise
IER_ETXRDY must also set thre_int_pending.

Reported by:	Illumos, according to emaste@
		https://twitter.com/ed_maste/status/1106195949087584258
MFC after:	2 weeks

usr.sbin/bhyve/uart_emul.c

@@ -431,6 +431,9 @@ uart_write(struct uart_softc *sc, int offset, uint8_t value)
 		sc->thre_int_pending = true;
 		break;
 	case REG_IER:
+		/* Set pending when IER_ETXRDY is raised (edge-triggered). */
+		if ((sc->ier & IER_ETXRDY) == 0 && (value & IER_ETXRDY) != 0)
+			sc->thre_int_pending = true;
 		/*
 		 * Apply mask so that bits 4-7 are 0
 		 * Also enables bits 0-3 only if they're 1