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ioat(4): Decode/define more capabilities, operations

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These are defined in the Intel Haswell EDS volume 2 (registers) (507849
v2.1).

Sponsored by:	EMC / Isilon Storage Division
This commit is contained in:
cem 2016-02-13 19:01:56 +00:00
parent 3275ec6409
commit 558491d7a7
2 changed files with 23 additions and 1 deletions
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8
sys/dev/ioat/ioat_hw.h
View File

@ -56,8 +56,13 @@ __FBSDID("$FreeBSD$");
#define IOAT_DMACAPABILITY_OFFSET 0x10
#define IOAT_DMACAP_PB (1 << 0)
#define IOAT_DMACAP_CRC (1 << 1)
#define IOAT_DMACAP_MARKER_SKIP (1 << 2)
#define IOAT_DMACAP_OLD_XOR (1 << 3)
#define IOAT_DMACAP_DCA (1 << 4)
#define IOAT_DMACAP_MOVECRC (1 << 5)
#define IOAT_DMACAP_BFILL (1 << 6)
#define IOAT_DMACAP_EXT_APIC (1 << 7)
#define IOAT_DMACAP_XOR (1 << 8)
#define IOAT_DMACAP_PQ (1 << 9)
#define IOAT_DMACAP_DMA_DIF (1 << 10)
@ -69,7 +74,8 @@ __FBSDID("$FreeBSD$");
#define IOAT_DMACAP_STR \
"\20\24Completion_Timeout_Support\23DMA_with_Multicasting_Support" \
"\22RAID_Super_descriptors\16Descriptor_Write_Back_Error_Support" \
"\13DMA_with_DIF\12PQ\11XOR\07Block_Fill\05DCA\01Page_Break"
"\13DMA_with_DIF\12PQ\11XOR\10Extended_APIC_ID\07Block_Fill\06Move_CRC" \
"\05DCA\04Old_XOR\03Marker_Skipping\02CRC\01Page_Break"
/* DMA Channel Registers */
#define IOAT_CHANCTRL_OFFSET 0x80

16
sys/dev/ioat/ioat_internal.h
View File

@ -346,6 +346,22 @@ struct ioat_descriptor {
bus_addr_t hw_desc_bus_addr;
};
/* Unsupported by this driver at this time. */
#define IOAT_OP_MOVECRC 0x41
#define IOAT_OP_MOVECRC_TEST 0x42
#define IOAT_OP_MOVECRC_STORE 0x43
#define IOAT_OP_CRC 0x81
#define IOAT_OP_CRC_TEST 0x82
#define IOAT_OP_CRC_STORE 0x83
#define IOAT_OP_MARKER 0x84
/*
* Deprecated OPs -- v3 DMA generates an abort if given these. And this driver
* doesn't support anything older than v3.
*/
#define IOAT_OP_OLD_XOR 0x85
#define IOAT_OP_OLD_XOR_VAL 0x86
enum ioat_ref_kind {
IOAT_DMAENGINE_REF = 0,
IOAT_ACTIVE_DESCR_REF,