ARM: Add identifiers for ARM Cortex v8 and Marvell Sheeva v7 cores.

Not a functional change.

MFC after: 3 days
This commit is contained in:
Michal Meloun 2016-10-06 12:01:10 +00:00
parent 4f18c103db
commit 55e447c98c
2 changed files with 13 additions and 1 deletions

View File

@ -165,7 +165,11 @@ cpuinfo_get_actlr_modifier(uint32_t *actlr_mask, uint32_t *actlr_set)
if (cpuinfo.implementer == CPU_IMPLEMENTER_ARM) {
switch (cpuinfo.part_number) {
case CPU_ARCH_CORTEX_A72:
case CPU_ARCH_CORTEX_A57:
case CPU_ARCH_CORTEX_A53:
/* Nothing to do for AArch32 */
break;
case CPU_ARCH_CORTEX_A17:
case CPU_ARCH_CORTEX_A12: /* A12 is merged to A17 */
/*

View File

@ -45,10 +45,18 @@
#define CPU_ARCH_CORTEX_A12 0xC0D
#define CPU_ARCH_CORTEX_A15 0xC0F
#define CPU_ARCH_CORTEX_A17 0xC11
#define CPU_ARCH_CORTEX_A53 0xD03
#define CPU_ARCH_CORTEX_A57 0xD07
#define CPU_ARCH_CORTEX_A72 0xD08
/* QCOM */
#define CPU_ARCH_KRAIT_300 0x06F
/* MRVL */
#define CPU_ARCH_SHEEVA_851 0x581 /* PJ4/PJ4B */
#define CPU_ARCH_SHEEVA_584 0x584 /* PJ4B-MP/PJ4C */
struct cpuinfo {
/* raw id registers */
uint32_t midr;