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MFC r277454, r277460, r277465, r277466, r277467, r277469, r277470, r277471,

Browse Source 
r277472, r277473, r277474, r277475, r277476, r277477, r277478, r277479,
    r277480, r277512, r277516:

  Add inline implementations of arm bus_space_read/write_N().

  Revise the arm bus_space implementation to avoid dereferencing the tag on
  every operation to retrieve the bs_cookie value almost nothing actually uses.

  Use the explicit member initializer style to init the bus_space struct.

  Use arm/bus_space-v6.c for all armv6 systems

  Consolidate many identical implementations of bus_space to a single
  common tag and implementation shared by armv4 and armv6.

  Micro-optimize the new arm inline bus_space implementation by grouping all
  the data the inline functions access together at the start of the bus_space
  struct so that they all fit in a single cache line.
This commit is contained in:
ian 2015-02-13 22:32:02 +00:00
parent b137f825dc
commit 56013bbc63
60 changed files with 866 additions and 2298 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
sys/arm/allwinner/a20/files.a20
View File

@ -17,7 +17,7 @@ arm/allwinner/a10_ehci.c optional ehci
arm/allwinner/if_emac.c optional emac
arm/allwinner/a10_wdog.c standard
arm/allwinner/timer.c standard
arm/arm/bus_space-v6.c standard
arm/allwinner/a10_common.c standard
arm/arm/bus_space_base.c standard
arm/allwinner/a10_common.c standard
arm/allwinner/a10_machdep.c standard
arm/allwinner/a20/a20_mp.c optional smp

4
sys/arm/allwinner/files.a10
View File

@ -19,5 +19,5 @@ arm/allwinner/a20/a20_cpu_cfg.c standard
arm/allwinner/aintc.c standard
arm/allwinner/if_emac.c optional emac
arm/allwinner/timer.c standard
arm/arm/bus_space-v6.c standard
#arm/allwinner/console.c standard
arm/arm/bus_space_base.c standard
#arm/allwinner/console.c standard

158
sys/arm/arm/bus_space-v6.c
View File

@ -1,158 +0,0 @@
/*-
* Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
* All rights reserved.
*
* Developed by Semihalf.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of MARVELL nor the names of contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus.h>
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
bs_protos(generic_armv4);
/*
* The bus space tag. This is constant for all instances, so
* we never have to explicitly "create" it.
*/
static struct bus_space _base_tag = {
/* cookie */
(void *) 0,
/* mapping/unmapping */
generic_bs_map,
generic_bs_unmap,
generic_bs_subregion,
/* allocation/deallocation */
generic_bs_alloc,
generic_bs_free,
/* barrier */
generic_bs_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
/* read region */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
/* write region */
generic_bs_wr_1,
generic_armv4_bs_wr_2,
generic_bs_wr_4,
NULL,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
/* set region */
generic_bs_sr_1,
generic_armv4_bs_sr_2,
generic_bs_sr_4,
NULL,
/* copy */
NULL,
generic_armv4_bs_c_2,
NULL,
NULL,
/* read stream (single) */
NULL,
NULL,
NULL,
NULL,
/* read multiple stream */
NULL,
generic_armv4_bs_rm_2, /* bus_space_read_multi_stream_2 */
NULL,
NULL,
/* read region stream */
NULL,
NULL,
NULL,
NULL,
/* write stream (single) */
NULL,
NULL,
NULL,
NULL,
/* write multiple stream */
NULL,
generic_armv4_bs_wm_2, /* bus_space_write_multi_stream_2 */
NULL,
NULL,
/* write region stream */
NULL,
NULL,
NULL,
NULL
};
bus_space_tag_t fdtbus_bs_tag = &_base_tag;

32
sys/arm/arm/bus_space_asm_generic.S
View File

@ -52,10 +52,10 @@ ENTRY(generic_bs_r_1)
RET
END(generic_bs_r_1)
ENTRY(generic_armv4_bs_r_2)
ENTRY(generic_bs_r_2)
ldrh r0, [r1, r2]
RET
END(generic_armv4_bs_r_2)
END(generic_bs_r_2)
ENTRY(generic_bs_r_4)
ldr r0, [r1, r2]
@ -71,10 +71,10 @@ ENTRY(generic_bs_w_1)
RET
END(generic_bs_w_1)
ENTRY(generic_armv4_bs_w_2)
ENTRY(generic_bs_w_2)
strh r3, [r1, r2]
RET
END(generic_armv4_bs_w_2)
END(generic_bs_w_2)
ENTRY(generic_bs_w_4)
str r3, [r1, r2]
@ -100,7 +100,7 @@ ENTRY(generic_bs_rm_1)
RET
END(generic_bs_rm_1)
ENTRY(generic_armv4_bs_rm_2)
ENTRY(generic_bs_rm_2)
add r0, r1, r2
mov r1, r3
ldr r2, [sp, #0]
@ -113,7 +113,7 @@ ENTRY(generic_armv4_bs_rm_2)
bne 1b
RET
END(generic_armv4_bs_rm_2)
END(generic_bs_rm_2)
ENTRY(generic_bs_rm_4)
add r0, r1, r2
@ -149,7 +149,7 @@ ENTRY(generic_bs_wm_1)
RET
END(generic_bs_wm_1)
ENTRY(generic_armv4_bs_wm_2)
ENTRY(generic_bs_wm_2)
add r0, r1, r2
mov r1, r3
ldr r2, [sp, #0]
@ -162,7 +162,7 @@ ENTRY(generic_armv4_bs_wm_2)
bne 1b
RET
END(generic_armv4_bs_wm_2)
END(generic_bs_wm_2)
ENTRY(generic_bs_wm_4)
add r0, r1, r2
@ -198,7 +198,7 @@ ENTRY(generic_bs_rr_1)
RET
END(generic_bs_rr_1)
ENTRY(generic_armv4_bs_rr_2)
ENTRY(generic_bs_rr_2)
add r0, r1, r2
mov r1, r3
ldr r2, [sp, #0]
@ -211,7 +211,7 @@ ENTRY(generic_armv4_bs_rr_2)
bne 1b
RET
END(generic_armv4_bs_rr_2)
END(generic_bs_rr_2)
ENTRY(generic_bs_rr_4)
add r0, r1, r2
@ -247,7 +247,7 @@ ENTRY(generic_bs_wr_1)
RET
END(generic_bs_wr_1)
ENTRY(generic_armv4_bs_wr_2)
ENTRY(generic_bs_wr_2)
add r0, r1, r2
mov r1, r3
ldr r2, [sp, #0]
@ -260,7 +260,7 @@ ENTRY(generic_armv4_bs_wr_2)
bne 1b
RET
END(generic_armv4_bs_wr_2)
END(generic_bs_wr_2)
ENTRY(generic_bs_wr_4)
add r0, r1, r2
@ -295,7 +295,7 @@ ENTRY(generic_bs_sr_1)
RET
END(generic_bs_sr_1)
ENTRY(generic_armv4_bs_sr_2)
ENTRY(generic_bs_sr_2)
add r0, r1, r2
mov r1, r3
ldr r2, [sp, #0]
@ -307,7 +307,7 @@ ENTRY(generic_armv4_bs_sr_2)
bne 1b
RET
END(generic_armv4_bs_sr_2)
END(generic_bs_sr_2)
ENTRY(generic_bs_sr_4)
add r0, r1, r2
@ -327,7 +327,7 @@ END(generic_bs_sr_4)
* copy region
*/
ENTRY(generic_armv4_bs_c_2)
ENTRY(generic_bs_c_2)
add r0, r1, r2
ldr r2, [sp, #0]
add r1, r2, r3
@ -356,5 +356,5 @@ ENTRY(generic_armv4_bs_c_2)
bne 3b
RET
END(generic_armv4_bs_c_2)
END(generic_bs_c_2)

159
sys/arm/arm/bus_space_base.c Normal file
View File

@ -0,0 +1,159 @@
/*-
* Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
* All rights reserved.
*
* Developed by Semihalf.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of MARVELL nor the names of contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <machine/bus.h>
#include "opt_platform.h"
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
/*
* The bus space tag. This is constant for all instances, so
* we never have to explicitly "create" it.
*/
static struct bus_space arm_base_bus_space __aligned(CACHE_LINE_SIZE) = {
/* privdata is whatever the implementer wants; unused in base tag */
.bs_privdata = NULL,
/* mapping/unmapping */
.bs_map = generic_bs_map,
.bs_unmap = generic_bs_unmap,
.bs_subregion = generic_bs_subregion,
/* allocation/deallocation */
.bs_alloc = generic_bs_alloc,
.bs_free = generic_bs_free,
/* barrier */
.bs_barrier = generic_bs_barrier,
/* read (single) */
.bs_r_1 = NULL, /* Use inline code in bus.h */
.bs_r_2 = NULL, /* Use inline code in bus.h */
.bs_r_4 = NULL, /* Use inline code in bus.h */
.bs_r_8 = NULL, /* Use inline code in bus.h */
/* read multiple */
.bs_rm_1 = generic_bs_rm_1,
.bs_rm_2 = generic_bs_rm_2,
.bs_rm_4 = generic_bs_rm_4,
.bs_rm_8 = BS_UNIMPLEMENTED,
/* read region */
.bs_rr_1 = generic_bs_rr_1,
.bs_rr_2 = generic_bs_rr_2,
.bs_rr_4 = generic_bs_rr_4,
.bs_rr_8 = BS_UNIMPLEMENTED,
/* write (single) */
.bs_w_1 = NULL, /* Use inline code in bus.h */
.bs_w_2 = NULL, /* Use inline code in bus.h */
.bs_w_4 = NULL, /* Use inline code in bus.h */
.bs_w_8 = NULL, /* Use inline code in bus.h */
/* write multiple */
.bs_wm_1 = generic_bs_wm_1,
.bs_wm_2 = generic_bs_wm_2,
.bs_wm_4 = generic_bs_wm_4,
.bs_wm_8 = BS_UNIMPLEMENTED,
/* write region */
.bs_wr_1 = generic_bs_wr_1,
.bs_wr_2 = generic_bs_wr_2,
.bs_wr_4 = generic_bs_wr_4,
.bs_wr_8 = BS_UNIMPLEMENTED,
/* set multiple */
.bs_sm_1 = BS_UNIMPLEMENTED,
.bs_sm_2 = BS_UNIMPLEMENTED,
.bs_sm_4 = BS_UNIMPLEMENTED,
.bs_sm_8 = BS_UNIMPLEMENTED,
/* set region */
.bs_sr_1 = generic_bs_sr_1,
.bs_sr_2 = generic_bs_sr_2,
.bs_sr_4 = generic_bs_sr_4,
.bs_sr_8 = BS_UNIMPLEMENTED,
/* copy */
.bs_c_1 = BS_UNIMPLEMENTED,
.bs_c_2 = generic_bs_c_2,
.bs_c_4 = BS_UNIMPLEMENTED,
.bs_c_8 = BS_UNIMPLEMENTED,
/* read stream (single) */
.bs_r_1_s = NULL, /* Use inline code in bus.h */
.bs_r_2_s = NULL, /* Use inline code in bus.h */
.bs_r_4_s = NULL, /* Use inline code in bus.h */
.bs_r_8_s = NULL, /* Use inline code in bus.h */
/* read multiple stream */
.bs_rm_1_s = generic_bs_rm_1,
.bs_rm_2_s = generic_bs_rm_2,
.bs_rm_4_s = generic_bs_rm_4,
.bs_rm_8_s = BS_UNIMPLEMENTED,
/* read region stream */
.bs_rr_1_s = generic_bs_rr_1,
.bs_rr_2_s = generic_bs_rr_2,
.bs_rr_4_s = generic_bs_rr_4,
.bs_rr_8_s = BS_UNIMPLEMENTED,
/* write stream (single) */
.bs_w_1_s = NULL, /* Use inline code in bus.h */
.bs_w_2_s = NULL, /* Use inline code in bus.h */
.bs_w_4_s = NULL, /* Use inline code in bus.h */
.bs_w_8_s = NULL, /* Use inline code in bus.h */
/* write multiple stream */
.bs_wm_1_s = generic_bs_wm_1,
.bs_wm_2_s = generic_bs_wm_2,
.bs_wm_4_s = generic_bs_wm_4,
.bs_wm_8_s = BS_UNIMPLEMENTED,
/* write region stream */
.bs_wr_1_s = generic_bs_wr_1,
.bs_wr_2_s = generic_bs_wr_2,
.bs_wr_4_s = generic_bs_wr_4,
.bs_wr_8_s = BS_UNIMPLEMENTED,
};
#ifdef FDT
bus_space_tag_t fdtbus_bs_tag = &arm_base_bus_space;
#endif
bus_space_tag_t arm_base_bs_tag = &arm_base_bus_space;

19
sys/arm/arm/bus_space_generic.c
View File

@ -53,11 +53,18 @@ __FBSDID("$FreeBSD$");
#include <machine/cpufunc.h>
#include <machine/devmap.h>
void
generic_bs_unimplemented(void)
{
panic("unimplemented bus_space function called");
}
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
int
generic_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
generic_bs_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size, int flags,
bus_space_handle_t *bshp)
{
void *va;
@ -74,7 +81,7 @@ generic_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
}
int
generic_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
generic_bs_alloc(bus_space_tag_t t, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
bus_size_t alignment, bus_size_t boundary, int flags, bus_addr_t *bpap,
bus_space_handle_t *bshp)
{
@ -84,21 +91,21 @@ generic_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
void
generic_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
generic_bs_unmap(bus_space_tag_t t, bus_space_handle_t h, bus_size_t size)
{
pmap_unmapdev((vm_offset_t)h, size);
}
void
generic_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
generic_bs_free(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
{
panic("generic_bs_free(): not implemented");
}
int
generic_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
generic_bs_subregion(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t size, bus_space_handle_t *nbshp)
{
@ -107,7 +114,7 @@ generic_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
}
void
generic_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
generic_bs_barrier(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t len, int flags)
{

160
sys/arm/at91/at91.c
View File

@ -55,7 +55,7 @@ __FBSDID("$FreeBSD$");
uint32_t at91_master_clock;
static int
at91_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
at91_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size, int flags,
bus_space_handle_t *bshp)
{
vm_paddr_t pa, endpa;
@ -77,23 +77,18 @@ at91_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
}
static void
at91_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
at91_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size)
{
vm_offset_t va, endva;
vm_offset_t va;
if (t == 0)
return;
va = trunc_page((vm_offset_t)t);
va = (vm_offset_t)h;
if (va >= AT91_BASE && va <= AT91_BASE + 0xff00000)
return;
endva = round_page((vm_offset_t)t + size);
/* Free the kernel virtual mapping. */
kva_free(va, endva - va);
pmap_unmapdev(va, size);
}
static int
at91_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
at91_bs_subregion(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t size, bus_space_handle_t *nbshp)
{
@ -102,7 +97,7 @@ at91_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
}
static void
at91_barrier(void *t, bus_space_handle_t bsh, bus_size_t size, bus_size_t b,
at91_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size, bus_size_t b,
int a)
{
}
@ -121,113 +116,112 @@ bus_dma_get_range_nb(void)
}
bs_protos(generic);
bs_protos(generic_armv4);
struct bus_space at91_bs_tag = {
/* cookie */
(void *) 0,
/* privdata is whatever the implementer wants; unused in base tag */
.bs_privdata = NULL,
/* mapping/unmapping */
at91_bs_map,
at91_bs_unmap,
at91_bs_subregion,
.bs_map = at91_bs_map,
.bs_unmap = at91_bs_unmap,
.bs_subregion = at91_bs_subregion,
/* allocation/deallocation */
NULL,
NULL,
.bs_alloc = generic_bs_alloc,
.bs_free = generic_bs_free,
/* barrier */
at91_barrier,
.bs_barrier = at91_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
.bs_r_1 = NULL, /* Use inline code in bus.h */
.bs_r_2 = NULL, /* Use inline code in bus.h */
.bs_r_4 = NULL, /* Use inline code in bus.h */
.bs_r_8 = NULL, /* Use inline code in bus.h */
/* read multiple */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
.bs_rm_1 = generic_bs_rm_1,
.bs_rm_2 = generic_bs_rm_2,
.bs_rm_4 = generic_bs_rm_4,
.bs_rm_8 = BS_UNIMPLEMENTED,
/* read region */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
.bs_rr_1 = generic_bs_rr_1,
.bs_rr_2 = generic_bs_rr_2,
.bs_rr_4 = generic_bs_rr_4,
.bs_rr_8 = BS_UNIMPLEMENTED,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
.bs_w_1 = NULL, /* Use inline code in bus.h */
.bs_w_2 = NULL, /* Use inline code in bus.h */
.bs_w_4 = NULL, /* Use inline code in bus.h */
.bs_w_8 = NULL, /* Use inline code in bus.h */
/* write multiple */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
.bs_wm_1 = generic_bs_wm_1,
.bs_wm_2 = generic_bs_wm_2,
.bs_wm_4 = generic_bs_wm_4,
.bs_wm_8 = BS_UNIMPLEMENTED,
/* write region */
NULL,
generic_armv4_bs_wr_2,
generic_bs_wr_4,
NULL,
.bs_wr_1 = generic_bs_wr_1,
.bs_wr_2 = generic_bs_wr_2,
.bs_wr_4 = generic_bs_wr_4,
.bs_wr_8 = BS_UNIMPLEMENTED,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
.bs_sm_1 = BS_UNIMPLEMENTED,
.bs_sm_2 = BS_UNIMPLEMENTED,
.bs_sm_4 = BS_UNIMPLEMENTED,
.bs_sm_8 = BS_UNIMPLEMENTED,
/* set region */
NULL,
generic_armv4_bs_sr_2,
generic_bs_sr_4,
NULL,
.bs_sr_1 = generic_bs_sr_1,
.bs_sr_2 = generic_bs_sr_2,
.bs_sr_4 = generic_bs_sr_4,
.bs_sr_8 = BS_UNIMPLEMENTED,
/* copy */
NULL,
generic_armv4_bs_c_2,
NULL,
NULL,
.bs_c_1 = BS_UNIMPLEMENTED,
.bs_c_2 = generic_bs_c_2,
.bs_c_4 = BS_UNIMPLEMENTED,
.bs_c_8 = BS_UNIMPLEMENTED,
/* read (single) stream */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read stream (single) */
.bs_r_1_s = NULL, /* Use inline code in bus.h */
.bs_r_2_s = NULL, /* Use inline code in bus.h */
.bs_r_4_s = NULL, /* Use inline code in bus.h */
.bs_r_8_s = NULL, /* Use inline code in bus.h */
/* read multiple stream */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
.bs_rm_1_s = generic_bs_rm_1,
.bs_rm_2_s = generic_bs_rm_2,
.bs_rm_4_s = generic_bs_rm_4,
.bs_rm_8_s = BS_UNIMPLEMENTED,
/* read region stream */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
.bs_rr_1_s = generic_bs_rr_1,
.bs_rr_2_s = generic_bs_rr_2,
.bs_rr_4_s = generic_bs_rr_4,
.bs_rr_8_s = BS_UNIMPLEMENTED,
/* write (single) stream */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write stream (single) */
.bs_w_1_s = NULL, /* Use inline code in bus.h */
.bs_w_2_s = NULL, /* Use inline code in bus.h */
.bs_w_4_s = NULL, /* Use inline code in bus.h */
.bs_w_8_s = NULL, /* Use inline code in bus.h */
/* write multiple stream */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
.bs_wm_1_s = generic_bs_wm_1,
.bs_wm_2_s = generic_bs_wm_2,
.bs_wm_4_s = generic_bs_wm_4,
.bs_wm_8_s = BS_UNIMPLEMENTED,
/* write region stream */
NULL,
generic_armv4_bs_wr_2,
generic_bs_wr_4,
NULL,
.bs_wr_1_s = generic_bs_wr_1,
.bs_wr_2_s = generic_bs_wr_2,
.bs_wr_4_s = generic_bs_wr_4,
.bs_wr_8_s = BS_UNIMPLEMENTED,
};
#ifndef FDT

1
sys/arm/at91/files.at91
View File

@ -1,4 +1,5 @@
# $FreeBSD$
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_arm9.S standard
arm/at91/at91_machdep.c standard
arm/at91/at91_aic.c standard

2
sys/arm/broadcom/bcm2835/files.bcm2835
View File

@ -16,7 +16,7 @@ arm/broadcom/bcm2835/bcm2835_systimer.c standard
arm/broadcom/bcm2835/bcm2835_wdog.c standard
dev/usb/controller/dwc_otg_fdt.c optional dwcotg
arm/arm/bus_space-v6.c standard
arm/arm/bus_space_base.c standard
arm/arm/bus_space_generic.c standard
arm/arm/bus_space_asm_generic.S standard
arm/arm/cpufunc_asm_arm11.S standard

118
sys/arm/cavium/cns11xx/econa.c
View File

@ -56,117 +56,7 @@ unsigned int CPU_clock = 200000000;
unsigned int AHB_clock;
unsigned int APB_clock;
bs_protos(generic);
bs_protos(generic_armv4);
struct bus_space econa_bs_tag = {
/* cookie */
(void *) 0,
/* mapping/unmapping */
generic_bs_map,
generic_bs_unmap,
generic_bs_subregion,
/* allocation/deallocation */
generic_bs_alloc,
generic_bs_free,
/* barrier */
generic_bs_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
/* read region */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
/* write region */
NULL,
NULL,
NULL,
NULL,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
/* set region */
NULL,
NULL,
NULL,
NULL,
/* copy */
NULL,
NULL,
NULL,
NULL,
/* read (single) stream */
NULL,
NULL,
NULL,
NULL,
/* read multiple stream */
NULL,
generic_armv4_bs_rm_2,
NULL,
NULL,
/* read region stream */
NULL,
NULL,
NULL,
NULL,
/* write (single) stream */
NULL,
NULL,
NULL,
NULL,
/* write multiple stream */
NULL,
generic_armv4_bs_wm_2,
NULL,
NULL,
/* write region stream */
NULL,
NULL,
NULL,
NULL
};
bus_space_tag_t obio_tag = &econa_bs_tag;
bus_space_tag_t obio_tag;
static int
econa_probe(device_t dev)
@ -465,8 +355,10 @@ econa_attach(device_t dev)
struct econa_softc *sc = device_get_softc(dev);
int i;
obio_tag = arm_base_bs_tag;
econa_softc = sc;
sc->ec_st = &econa_bs_tag;
sc->ec_st = arm_base_bs_tag;
sc->ec_sh = ECONA_IO_BASE;
sc->dev = dev;
if (bus_space_subregion(sc->ec_st, sc->ec_sh, ECONA_PIC_BASE,
@ -548,7 +440,7 @@ econa_alloc_resource(device_t dev, device_t child, int type, int *rid,
rle->res = rman_reserve_resource(&sc->ec_mem_rman,
start, end, count, flags, child);
if (rle->res != NULL) {
rman_set_bustag(rle->res, &econa_bs_tag);
rman_set_bustag(rle->res, arm_base_bs_tag);
rman_set_bushandle(rle->res, start);
}
break;

1
sys/arm/cavium/cns11xx/files.econa
View File

@ -6,6 +6,7 @@ arm/cavium/cns11xx/timer.c standard
arm/cavium/cns11xx/uart_bus_ec.c optional uart
arm/cavium/cns11xx/uart_cpu_ec.c optional uart
dev/uart/uart_dev_ns8250.c optional uart
arm/arm/bus_space_base.c standard
arm/arm/bus_space_generic.c standard
arm/cavium/cns11xx/ehci_ebus.c optional ehci
arm/cavium/cns11xx/ohci_ec.c optional ohci

2
sys/arm/freescale/imx/files.imx51
View File

@ -10,7 +10,7 @@ kern/kern_clocksource.c standard
arm/freescale/imx/imx_common.c standard
arm/freescale/imx/imx_machdep.c standard
arm/freescale/imx/imx51_machdep.c standard
arm/arm/bus_space-v6.c standard
arm/arm/bus_space_base.c standard
# Dummy serial console
#arm/freescale/imx/console.c standard

2
sys/arm/freescale/imx/files.imx53
View File

@ -10,7 +10,7 @@ kern/kern_clocksource.c standard
arm/freescale/imx/imx_common.c standard
arm/freescale/imx/imx_machdep.c standard
arm/freescale/imx/imx53_machdep.c standard
arm/arm/bus_space-v6.c standard
arm/arm/bus_space_base.c standard
# Special serial console for debuging early boot code
#arm/freescale/imx/console.c standard

2
sys/arm/freescale/imx/files.imx6
View File

@ -15,7 +15,7 @@ kern/kern_clocksource.c standard
#
arm/arm/gic.c standard
arm/arm/pl310.c standard
arm/arm/bus_space-v6.c standard
arm/arm/bus_space_base.c standard
arm/arm/mpcore_timer.c standard
arm/freescale/fsl_ocotp.c standard
arm/freescale/imx/imx6_anatop.c standard

2
sys/arm/freescale/vybrid/files.vybrid
View File

@ -9,7 +9,7 @@ arm/arm/cpufunc_asm_arm10.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/bus_space-v6.c standard
arm/arm/bus_space_base.c standard
arm/arm/gic.c standard
arm/arm/mpcore_timer.c standard

495
sys/arm/include/bus.h
View File

@ -79,172 +79,180 @@
#define BUS_SPACE_MAP_LINEAR 0x02
#define BUS_SPACE_MAP_PREFETCHABLE 0x04
/*
* Bus space for ARM.
*
* The functions used most often are grouped together at the beginning to ensure
* that all the data fits into a single cache line. The inline implementations
* of single read/write access these values a lot.
*/
struct bus_space {
/* cookie */
void *bs_cookie;
/* Read/write single and barrier: the most commonly used functions. */
uint8_t (*bs_r_1)(bus_space_tag_t, bus_space_handle_t, bus_size_t);
uint32_t (*bs_r_4)(bus_space_tag_t, bus_space_handle_t, bus_size_t);
void (*bs_w_1)(bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint8_t);
void (*bs_w_4)(bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint32_t);
void (*bs_barrier)(bus_space_tag_t, bus_space_handle_t,
bus_size_t, bus_size_t, int);
/* Backlink to parent (if copied), and implementation private data. */
struct bus_space *bs_parent;
void *bs_privdata;
/* mapping/unmapping */
int (*bs_map) (void *, bus_addr_t, bus_size_t,
int (*bs_map) (bus_space_tag_t, bus_addr_t, bus_size_t,
int, bus_space_handle_t *);
void (*bs_unmap) (void *, bus_space_handle_t, bus_size_t);
int (*bs_subregion) (void *, bus_space_handle_t,
void (*bs_unmap) (bus_space_tag_t, bus_space_handle_t, bus_size_t);
int (*bs_subregion) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, bus_size_t, bus_space_handle_t *);
/* allocation/deallocation */
int (*bs_alloc) (void *, bus_addr_t, bus_addr_t,
int (*bs_alloc) (bus_space_tag_t, bus_addr_t, bus_addr_t,
bus_size_t, bus_size_t, bus_size_t, int,
bus_addr_t *, bus_space_handle_t *);
void (*bs_free) (void *, bus_space_handle_t,
void (*bs_free) (bus_space_tag_t, bus_space_handle_t,
bus_size_t);
/* get kernel virtual address */
/* barrier */
void (*bs_barrier) (void *, bus_space_handle_t,
bus_size_t, bus_size_t, int);
/* read (single) */
u_int8_t (*bs_r_1) (void *, bus_space_handle_t, bus_size_t);
u_int16_t (*bs_r_2) (void *, bus_space_handle_t, bus_size_t);
u_int32_t (*bs_r_4) (void *, bus_space_handle_t, bus_size_t);
u_int64_t (*bs_r_8) (void *, bus_space_handle_t, bus_size_t);
/* Read single, the less commonly used functions. */
uint16_t (*bs_r_2) (bus_space_tag_t, bus_space_handle_t, bus_size_t);
uint64_t (*bs_r_8) (bus_space_tag_t, bus_space_handle_t, bus_size_t);
/* read multiple */
void (*bs_rm_1) (void *, bus_space_handle_t, bus_size_t,
u_int8_t *, bus_size_t);
void (*bs_rm_2) (void *, bus_space_handle_t, bus_size_t,
u_int16_t *, bus_size_t);
void (*bs_rm_4) (void *, bus_space_handle_t,
bus_size_t, u_int32_t *, bus_size_t);
void (*bs_rm_8) (void *, bus_space_handle_t,
bus_size_t, u_int64_t *, bus_size_t);
void (*bs_rm_1) (bus_space_tag_t, bus_space_handle_t, bus_size_t,
uint8_t *, bus_size_t);
void (*bs_rm_2) (bus_space_tag_t, bus_space_handle_t, bus_size_t,
uint16_t *, bus_size_t);
void (*bs_rm_4) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rm_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* read region */
void (*bs_rr_1) (void *, bus_space_handle_t,
bus_size_t, u_int8_t *, bus_size_t);
void (*bs_rr_2) (void *, bus_space_handle_t,
bus_size_t, u_int16_t *, bus_size_t);
void (*bs_rr_4) (void *, bus_space_handle_t,
bus_size_t, u_int32_t *, bus_size_t);
void (*bs_rr_8) (void *, bus_space_handle_t,
bus_size_t, u_int64_t *, bus_size_t);
void (*bs_rr_1) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint8_t *, bus_size_t);
void (*bs_rr_2) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint16_t *, bus_size_t);
void (*bs_rr_4) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rr_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* write (single) */
void (*bs_w_1) (void *, bus_space_handle_t,
bus_size_t, u_int8_t);
void (*bs_w_2) (void *, bus_space_handle_t,
bus_size_t, u_int16_t);
void (*bs_w_4) (void *, bus_space_handle_t,
bus_size_t, u_int32_t);
void (*bs_w_8) (void *, bus_space_handle_t,
bus_size_t, u_int64_t);
/* Write single, the less commonly used functions. */
void (*bs_w_2) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint16_t);
void (*bs_w_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t);
/* write multiple */
void (*bs_wm_1) (void *, bus_space_handle_t,
bus_size_t, const u_int8_t *, bus_size_t);
void (*bs_wm_2) (void *, bus_space_handle_t,
bus_size_t, const u_int16_t *, bus_size_t);
void (*bs_wm_4) (void *, bus_space_handle_t,
bus_size_t, const u_int32_t *, bus_size_t);
void (*bs_wm_8) (void *, bus_space_handle_t,
bus_size_t, const u_int64_t *, bus_size_t);
void (*bs_wm_1) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint8_t *, bus_size_t);
void (*bs_wm_2) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint16_t *, bus_size_t);
void (*bs_wm_4) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint32_t *, bus_size_t);
void (*bs_wm_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint64_t *, bus_size_t);
/* write region */
void (*bs_wr_1) (void *, bus_space_handle_t,
bus_size_t, const u_int8_t *, bus_size_t);
void (*bs_wr_2) (void *, bus_space_handle_t,
bus_size_t, const u_int16_t *, bus_size_t);
void (*bs_wr_4) (void *, bus_space_handle_t,
bus_size_t, const u_int32_t *, bus_size_t);
void (*bs_wr_8) (void *, bus_space_handle_t,
bus_size_t, const u_int64_t *, bus_size_t);
void (*bs_wr_1) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint8_t *, bus_size_t);
void (*bs_wr_2) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint16_t *, bus_size_t);
void (*bs_wr_4) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint32_t *, bus_size_t);
void (*bs_wr_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint64_t *, bus_size_t);
/* set multiple */
void (*bs_sm_1) (void *, bus_space_handle_t,
bus_size_t, u_int8_t, bus_size_t);
void (*bs_sm_2) (void *, bus_space_handle_t,
bus_size_t, u_int16_t, bus_size_t);
void (*bs_sm_4) (void *, bus_space_handle_t,
bus_size_t, u_int32_t, bus_size_t);
void (*bs_sm_8) (void *, bus_space_handle_t,
bus_size_t, u_int64_t, bus_size_t);
void (*bs_sm_1) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint8_t, bus_size_t);
void (*bs_sm_2) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint16_t, bus_size_t);
void (*bs_sm_4) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint32_t, bus_size_t);
void (*bs_sm_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t, bus_size_t);
/* set region */
void (*bs_sr_1) (void *, bus_space_handle_t,
bus_size_t, u_int8_t, bus_size_t);
void (*bs_sr_2) (void *, bus_space_handle_t,
bus_size_t, u_int16_t, bus_size_t);
void (*bs_sr_4) (void *, bus_space_handle_t,
bus_size_t, u_int32_t, bus_size_t);
void (*bs_sr_8) (void *, bus_space_handle_t,
bus_size_t, u_int64_t, bus_size_t);
void (*bs_sr_1) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint8_t, bus_size_t);
void (*bs_sr_2) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint16_t, bus_size_t);
void (*bs_sr_4) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint32_t, bus_size_t);
void (*bs_sr_8) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t, bus_size_t);
/* copy */
void (*bs_c_1) (void *, bus_space_handle_t, bus_size_t,
void (*bs_c_1) (bus_space_tag_t, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t);
void (*bs_c_2) (void *, bus_space_handle_t, bus_size_t,
void (*bs_c_2) (bus_space_tag_t, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t);
void (*bs_c_4) (void *, bus_space_handle_t, bus_size_t,
void (*bs_c_4) (bus_space_tag_t, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t);
void (*bs_c_8) (void *, bus_space_handle_t, bus_size_t,
void (*bs_c_8) (bus_space_tag_t, bus_space_handle_t, bus_size_t,
bus_space_handle_t, bus_size_t, bus_size_t);
/* read stream (single) */
u_int8_t (*bs_r_1_s) (void *, bus_space_handle_t, bus_size_t);
u_int16_t (*bs_r_2_s) (void *, bus_space_handle_t, bus_size_t);
u_int32_t (*bs_r_4_s) (void *, bus_space_handle_t, bus_size_t);
u_int64_t (*bs_r_8_s) (void *, bus_space_handle_t, bus_size_t);
uint8_t (*bs_r_1_s) (bus_space_tag_t, bus_space_handle_t, bus_size_t);
uint16_t (*bs_r_2_s) (bus_space_tag_t, bus_space_handle_t, bus_size_t);
uint32_t (*bs_r_4_s) (bus_space_tag_t, bus_space_handle_t, bus_size_t);
uint64_t (*bs_r_8_s) (bus_space_tag_t, bus_space_handle_t, bus_size_t);
/* read multiple stream */
void (*bs_rm_1_s) (void *, bus_space_handle_t, bus_size_t,
u_int8_t *, bus_size_t);
void (*bs_rm_2_s) (void *, bus_space_handle_t, bus_size_t,
u_int16_t *, bus_size_t);
void (*bs_rm_4_s) (void *, bus_space_handle_t,
bus_size_t, u_int32_t *, bus_size_t);
void (*bs_rm_8_s) (void *, bus_space_handle_t,
bus_size_t, u_int64_t *, bus_size_t);
void (*bs_rm_1_s) (bus_space_tag_t, bus_space_handle_t, bus_size_t,
uint8_t *, bus_size_t);
void (*bs_rm_2_s) (bus_space_tag_t, bus_space_handle_t, bus_size_t,
uint16_t *, bus_size_t);
void (*bs_rm_4_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rm_8_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* read region stream */
void (*bs_rr_1_s) (void *, bus_space_handle_t,
bus_size_t, u_int8_t *, bus_size_t);
void (*bs_rr_2_s) (void *, bus_space_handle_t,
bus_size_t, u_int16_t *, bus_size_t);
void (*bs_rr_4_s) (void *, bus_space_handle_t,
bus_size_t, u_int32_t *, bus_size_t);
void (*bs_rr_8_s) (void *, bus_space_handle_t,
bus_size_t, u_int64_t *, bus_size_t);
void (*bs_rr_1_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint8_t *, bus_size_t);
void (*bs_rr_2_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint16_t *, bus_size_t);
void (*bs_rr_4_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rr_8_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
/* write stream (single) */
void (*bs_w_1_s) (void *, bus_space_handle_t,
bus_size_t, u_int8_t);
void (*bs_w_2_s) (void *, bus_space_handle_t,
bus_size_t, u_int16_t);
void (*bs_w_4_s) (void *, bus_space_handle_t,
bus_size_t, u_int32_t);
void (*bs_w_8_s) (void *, bus_space_handle_t,
bus_size_t, u_int64_t);
void (*bs_w_1_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint8_t);
void (*bs_w_2_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint16_t);
void (*bs_w_4_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint32_t);
void (*bs_w_8_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, uint64_t);
/* write multiple stream */
void (*bs_wm_1_s) (void *, bus_space_handle_t,
bus_size_t, const u_int8_t *, bus_size_t);
void (*bs_wm_2_s) (void *, bus_space_handle_t,
bus_size_t, const u_int16_t *, bus_size_t);
void (*bs_wm_4_s) (void *, bus_space_handle_t,
bus_size_t, const u_int32_t *, bus_size_t);
void (*bs_wm_8_s) (void *, bus_space_handle_t,
bus_size_t, const u_int64_t *, bus_size_t);
void (*bs_wm_1_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint8_t *, bus_size_t);
void (*bs_wm_2_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint16_t *, bus_size_t);
void (*bs_wm_4_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint32_t *, bus_size_t);
void (*bs_wm_8_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint64_t *, bus_size_t);
/* write region stream */
void (*bs_wr_1_s) (void *, bus_space_handle_t,
bus_size_t, const u_int8_t *, bus_size_t);
void (*bs_wr_2_s) (void *, bus_space_handle_t,
bus_size_t, const u_int16_t *, bus_size_t);
void (*bs_wr_4_s) (void *, bus_space_handle_t,
bus_size_t, const u_int32_t *, bus_size_t);
void (*bs_wr_8_s) (void *, bus_space_handle_t,
bus_size_t, const u_int64_t *, bus_size_t);
void (*bs_wr_1_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint8_t *, bus_size_t);
void (*bs_wr_2_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint16_t *, bus_size_t);
void (*bs_wr_4_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint32_t *, bus_size_t);
void (*bs_wr_8_s) (bus_space_tag_t, bus_space_handle_t,
bus_size_t, const uint64_t *, bus_size_t);
};
extern bus_space_tag_t arm_base_bs_tag;
/*
* Utility macros; INTERNAL USE ONLY.
@ -252,51 +260,69 @@ struct bus_space {
#define __bs_c(a,b) __CONCAT(a,b)
#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
#define __bs_rs(sz, t, h, o) \
(*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)
#define __bs_ws(sz, t, h, o, v) \
(*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)
#define __bs_nonsingle(type, sz, t, h, o, a, c) \
(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)
(*(t)->__bs_opname(type,sz))((t), h, o, a, c)
#define __bs_set(type, sz, t, h, o, v, c) \
(*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)
(*(t)->__bs_opname(type,sz))((t), h, o, v, c)
#define __bs_copy(sz, t, h1, o1, h2, o2, cnt) \
(*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
(*(t)->__bs_opname(c,sz))((t), h1, o1, h2, o2, cnt)
#define __bs_opname_s(op,size) __bs_c(__bs_c(__bs_c(__bs_c(bs_,op),_),size),_s)
#define __bs_rs_s(sz, t, h, o) \
(*(t)->__bs_opname_s(r,sz))((t)->bs_cookie, h, o)
(*(t)->__bs_opname_s(r,sz))((t), h, o)
#define __bs_ws_s(sz, t, h, o, v) \
(*(t)->__bs_opname_s(w,sz))((t)->bs_cookie, h, o, v)
(*(t)->__bs_opname_s(w,sz))((t), h, o, v)
#define __bs_nonsingle_s(type, sz, t, h, o, a, c) \
(*(t)->__bs_opname_s(type,sz))((t)->bs_cookie, h, o, a, c)
(*(t)->__bs_opname_s(type,sz))((t), h, o, a, c)
#define __generate_inline_bs_rs(IFN, MBR, TYP) \
static inline TYP \
IFN(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o) \
{ \
\
if (__predict_true(t->MBR == NULL)) \
return (*(volatile TYP *)(h + o)); \
else \
return (t->MBR(t, h, o)); \
}
#define __generate_inline_bs_ws(IFN, MBR, TYP) \
static inline void \
IFN(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, TYP v)\
{ \
\
if (__predict_true(t->MBR == NULL)) \
*(volatile TYP *)(h + o) = v; \
else \
t->MBR(t, h, o, v); \
}
/*
* Mapping and unmapping operations.
*/
#define bus_space_map(t, a, s, c, hp) \
(*(t)->bs_map)((t)->bs_cookie, (a), (s), (c), (hp))
(*(t)->bs_map)((t), (a), (s), (c), (hp))
#define bus_space_unmap(t, h, s) \
(*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
(*(t)->bs_unmap)((t), (h), (s))
#define bus_space_subregion(t, h, o, s, hp) \
(*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
(*(t)->bs_subregion)((t), (h), (o), (s), (hp))
/*
* Allocation and deallocation operations.
*/
#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) \
(*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
(*(t)->bs_alloc)((t), (rs), (re), (s), (a), (b), \
(c), (ap), (hp))
#define bus_space_free(t, h, s) \
(*(t)->bs_free)((t)->bs_cookie, (h), (s))
(*(t)->bs_free)((t), (h), (s))
/*
* Bus barrier operations.
*/
#define bus_space_barrier(t, h, o, l, f) \
(*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f))
(*(t)->bs_barrier)((t), (h), (o), (l), (f))
#define BUS_SPACE_BARRIER_READ 0x01
#define BUS_SPACE_BARRIER_WRITE 0x02
@ -304,15 +330,15 @@ struct bus_space {
/*
* Bus read (single) operations.
*/
#define bus_space_read_1(t, h, o) __bs_rs(1,(t),(h),(o))
#define bus_space_read_2(t, h, o) __bs_rs(2,(t),(h),(o))
#define bus_space_read_4(t, h, o) __bs_rs(4,(t),(h),(o))
#define bus_space_read_8(t, h, o) __bs_rs(8,(t),(h),(o))
__generate_inline_bs_rs(bus_space_read_1, bs_r_1, uint8_t);
__generate_inline_bs_rs(bus_space_read_2, bs_r_2, uint16_t);
__generate_inline_bs_rs(bus_space_read_4, bs_r_4, uint32_t);
__generate_inline_bs_rs(bus_space_read_8, bs_r_8, uint64_t);
#define bus_space_read_stream_1(t, h, o) __bs_rs_s(1,(t), (h), (o))
#define bus_space_read_stream_2(t, h, o) __bs_rs_s(2,(t), (h), (o))
#define bus_space_read_stream_4(t, h, o) __bs_rs_s(4,(t), (h), (o))
#define bus_space_read_stream_8(t, h, o) __bs_rs_s(8,8,(t),(h),(o))
__generate_inline_bs_rs(bus_space_read_stream_1, bs_r_1_s, uint8_t);
__generate_inline_bs_rs(bus_space_read_stream_2, bs_r_2_s, uint16_t);
__generate_inline_bs_rs(bus_space_read_stream_4, bs_r_4_s, uint32_t);
__generate_inline_bs_rs(bus_space_read_stream_8, bs_r_8_s, uint64_t);
/*
* Bus read multiple operations.
@ -361,15 +387,15 @@ struct bus_space {
/*
* Bus write (single) operations.
*/
#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v))
#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v))
#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v))
#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v))
__generate_inline_bs_ws(bus_space_write_1, bs_w_1, uint8_t);
__generate_inline_bs_ws(bus_space_write_2, bs_w_2, uint16_t);
__generate_inline_bs_ws(bus_space_write_4, bs_w_4, uint32_t);
__generate_inline_bs_ws(bus_space_write_8, bs_w_8, uint64_t);
#define bus_space_write_stream_1(t, h, o, v) __bs_ws_s(1,(t),(h),(o),(v))
#define bus_space_write_stream_2(t, h, o, v) __bs_ws_s(2,(t),(h),(o),(v))
#define bus_space_write_stream_4(t, h, o, v) __bs_ws_s(4,(t),(h),(o),(v))
#define bus_space_write_stream_8(t, h, o, v) __bs_ws_s(8,(t),(h),(o),(v))
__generate_inline_bs_ws(bus_space_write_stream_1, bs_w_1_s, uint8_t);
__generate_inline_bs_ws(bus_space_write_stream_2, bs_w_2_s, uint16_t);
__generate_inline_bs_ws(bus_space_write_stream_4, bs_w_4_s, uint32_t);
__generate_inline_bs_ws(bus_space_write_stream_8, bs_w_8_s, uint64_t);
/*
@ -460,204 +486,204 @@ struct bus_space {
*/
#define bs_map_proto(f) \
int __bs_c(f,_bs_map) (void *t, bus_addr_t addr, \
int __bs_c(f,_bs_map) (bus_space_tag_t t, bus_addr_t addr, \
bus_size_t size, int cacheable, bus_space_handle_t *bshp);
#define bs_unmap_proto(f) \
void __bs_c(f,_bs_unmap) (void *t, bus_space_handle_t bsh, \
void __bs_c(f,_bs_unmap) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t size);
#define bs_subregion_proto(f) \
int __bs_c(f,_bs_subregion) (void *t, bus_space_handle_t bsh, \
int __bs_c(f,_bs_subregion) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, bus_size_t size, \
bus_space_handle_t *nbshp);
#define bs_alloc_proto(f) \
int __bs_c(f,_bs_alloc) (void *t, bus_addr_t rstart, \
int __bs_c(f,_bs_alloc) (bus_space_tag_t t, bus_addr_t rstart, \
bus_addr_t rend, bus_size_t size, bus_size_t align, \
bus_size_t boundary, int cacheable, bus_addr_t *addrp, \
bus_space_handle_t *bshp);
#define bs_free_proto(f) \
void __bs_c(f,_bs_free) (void *t, bus_space_handle_t bsh, \
void __bs_c(f,_bs_free) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t size);
#define bs_mmap_proto(f) \
int __bs_c(f,_bs_mmap) (struct cdev *, vm_offset_t, vm_paddr_t *, int);
#define bs_barrier_proto(f) \
void __bs_c(f,_bs_barrier) (void *t, bus_space_handle_t bsh, \
void __bs_c(f,_bs_barrier) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, bus_size_t len, int flags);
#define bs_r_1_proto(f) \
u_int8_t __bs_c(f,_bs_r_1) (void *t, bus_space_handle_t bsh, \
uint8_t __bs_c(f,_bs_r_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset);
#define bs_r_2_proto(f) \
u_int16_t __bs_c(f,_bs_r_2) (void *t, bus_space_handle_t bsh, \
uint16_t __bs_c(f,_bs_r_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset);
#define bs_r_4_proto(f) \
u_int32_t __bs_c(f,_bs_r_4) (void *t, bus_space_handle_t bsh, \
uint32_t __bs_c(f,_bs_r_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset);
#define bs_r_8_proto(f) \
u_int64_t __bs_c(f,_bs_r_8) (void *t, bus_space_handle_t bsh, \
uint64_t __bs_c(f,_bs_r_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset);
#define bs_r_1_s_proto(f) \
u_int8_t __bs_c(f,_bs_r_1_s) (void *t, bus_space_handle_t bsh, \
uint8_t __bs_c(f,_bs_r_1_s) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset);
#define bs_r_2_s_proto(f) \
u_int16_t __bs_c(f,_bs_r_2_s) (void *t, bus_space_handle_t bsh, \
uint16_t __bs_c(f,_bs_r_2_s) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset);
#define bs_r_4_s_proto(f) \
u_int32_t __bs_c(f,_bs_r_4_s) (void *t, bus_space_handle_t bsh, \
uint32_t __bs_c(f,_bs_r_4_s) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset);
#define bs_w_1_proto(f) \
void __bs_c(f,_bs_w_1) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int8_t value);
void __bs_c(f,_bs_w_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint8_t value);
#define bs_w_2_proto(f) \
void __bs_c(f,_bs_w_2) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int16_t value);
void __bs_c(f,_bs_w_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint16_t value);
#define bs_w_4_proto(f) \
void __bs_c(f,_bs_w_4) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int32_t value);
void __bs_c(f,_bs_w_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint32_t value);
#define bs_w_8_proto(f) \
void __bs_c(f,_bs_w_8) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int64_t value);
void __bs_c(f,_bs_w_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint64_t value);
#define bs_w_1_s_proto(f) \
void __bs_c(f,_bs_w_1_s) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int8_t value);
void __bs_c(f,_bs_w_1_s) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint8_t value);
#define bs_w_2_s_proto(f) \
void __bs_c(f,_bs_w_2_s) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int16_t value);
void __bs_c(f,_bs_w_2_s) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint16_t value);
#define bs_w_4_s_proto(f) \
void __bs_c(f,_bs_w_4_s) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int32_t value);
void __bs_c(f,_bs_w_4_s) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint32_t value);
#define bs_rm_1_proto(f) \
void __bs_c(f,_bs_rm_1) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int8_t *addr, bus_size_t count);
void __bs_c(f,_bs_rm_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint8_t *addr, bus_size_t count);
#define bs_rm_2_proto(f) \
void __bs_c(f,_bs_rm_2) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int16_t *addr, bus_size_t count);
void __bs_c(f,_bs_rm_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint16_t *addr, bus_size_t count);
#define bs_rm_4_proto(f) \
void __bs_c(f,_bs_rm_4) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int32_t *addr, bus_size_t count);
void __bs_c(f,_bs_rm_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint32_t *addr, bus_size_t count);
#define bs_rm_8_proto(f) \
void __bs_c(f,_bs_rm_8) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int64_t *addr, bus_size_t count);
void __bs_c(f,_bs_rm_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint64_t *addr, bus_size_t count);
#define bs_wm_1_proto(f) \
void __bs_c(f,_bs_wm_1) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, const u_int8_t *addr, bus_size_t count);
void __bs_c(f,_bs_wm_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, const uint8_t *addr, bus_size_t count);
#define bs_wm_2_proto(f) \
void __bs_c(f,_bs_wm_2) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, const u_int16_t *addr, bus_size_t count);
void __bs_c(f,_bs_wm_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, const uint16_t *addr, bus_size_t count);
#define bs_wm_4_proto(f) \
void __bs_c(f,_bs_wm_4) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, const u_int32_t *addr, bus_size_t count);
void __bs_c(f,_bs_wm_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, const uint32_t *addr, bus_size_t count);
#define bs_wm_8_proto(f) \
void __bs_c(f,_bs_wm_8) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, const u_int64_t *addr, bus_size_t count);
void __bs_c(f,_bs_wm_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, const uint64_t *addr, bus_size_t count);
#define bs_rr_1_proto(f) \
void __bs_c(f, _bs_rr_1) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int8_t *addr, bus_size_t count);
void __bs_c(f, _bs_rr_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint8_t *addr, bus_size_t count);
#define bs_rr_2_proto(f) \
void __bs_c(f, _bs_rr_2) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int16_t *addr, bus_size_t count);
void __bs_c(f, _bs_rr_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint16_t *addr, bus_size_t count);
#define bs_rr_4_proto(f) \
void __bs_c(f, _bs_rr_4) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int32_t *addr, bus_size_t count);
void __bs_c(f, _bs_rr_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint32_t *addr, bus_size_t count);
#define bs_rr_8_proto(f) \
void __bs_c(f, _bs_rr_8) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int64_t *addr, bus_size_t count);
void __bs_c(f, _bs_rr_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint64_t *addr, bus_size_t count);
#define bs_wr_1_proto(f) \
void __bs_c(f, _bs_wr_1) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, const u_int8_t *addr, bus_size_t count);
void __bs_c(f, _bs_wr_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, const uint8_t *addr, bus_size_t count);
#define bs_wr_2_proto(f) \
void __bs_c(f, _bs_wr_2) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, const u_int16_t *addr, bus_size_t count);
void __bs_c(f, _bs_wr_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, const uint16_t *addr, bus_size_t count);
#define bs_wr_4_proto(f) \
void __bs_c(f, _bs_wr_4) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, const u_int32_t *addr, bus_size_t count);
void __bs_c(f, _bs_wr_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, const uint32_t *addr, bus_size_t count);
#define bs_wr_8_proto(f) \
void __bs_c(f, _bs_wr_8) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, const u_int64_t *addr, bus_size_t count);
void __bs_c(f, _bs_wr_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, const uint64_t *addr, bus_size_t count);
#define bs_sm_1_proto(f) \
void __bs_c(f,_bs_sm_1) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int8_t value, bus_size_t count);
void __bs_c(f,_bs_sm_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint8_t value, bus_size_t count);
#define bs_sm_2_proto(f) \
void __bs_c(f,_bs_sm_2) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int16_t value, bus_size_t count);
void __bs_c(f,_bs_sm_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint16_t value, bus_size_t count);
#define bs_sm_4_proto(f) \
void __bs_c(f,_bs_sm_4) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int32_t value, bus_size_t count);
void __bs_c(f,_bs_sm_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint32_t value, bus_size_t count);
#define bs_sm_8_proto(f) \
void __bs_c(f,_bs_sm_8) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int64_t value, bus_size_t count);
void __bs_c(f,_bs_sm_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint64_t value, bus_size_t count);
#define bs_sr_1_proto(f) \
void __bs_c(f,_bs_sr_1) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int8_t value, bus_size_t count);
void __bs_c(f,_bs_sr_1) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint8_t value, bus_size_t count);
#define bs_sr_2_proto(f) \
void __bs_c(f,_bs_sr_2) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int16_t value, bus_size_t count);
void __bs_c(f,_bs_sr_2) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint16_t value, bus_size_t count);
#define bs_sr_4_proto(f) \
void __bs_c(f,_bs_sr_4) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int32_t value, bus_size_t count);
void __bs_c(f,_bs_sr_4) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint32_t value, bus_size_t count);
#define bs_sr_8_proto(f) \
void __bs_c(f,_bs_sr_8) (void *t, bus_space_handle_t bsh, \
bus_size_t offset, u_int64_t value, bus_size_t count);
void __bs_c(f,_bs_sr_8) (bus_space_tag_t t, bus_space_handle_t bsh, \
bus_size_t offset, uint64_t value, bus_size_t count);
#define bs_c_1_proto(f) \
void __bs_c(f,_bs_c_1) (void *t, bus_space_handle_t bsh1, \
void __bs_c(f,_bs_c_1) (bus_space_tag_t t, bus_space_handle_t bsh1, \
bus_size_t offset1, bus_space_handle_t bsh2, \
bus_size_t offset2, bus_size_t count);
#define bs_c_2_proto(f) \
void __bs_c(f,_bs_c_2) (void *t, bus_space_handle_t bsh1, \
void __bs_c(f,_bs_c_2) (bus_space_tag_t t, bus_space_handle_t bsh1, \
bus_size_t offset1, bus_space_handle_t bsh2, \
bus_size_t offset2, bus_size_t count);
#define bs_c_4_proto(f) \
void __bs_c(f,_bs_c_4) (void *t, bus_space_handle_t bsh1, \
void __bs_c(f,_bs_c_4) (bus_space_tag_t t, bus_space_handle_t bsh1, \
bus_size_t offset1, bus_space_handle_t bsh2, \
bus_size_t offset2, bus_size_t count);
#define bs_c_8_proto(f) \
void __bs_c(f,_bs_c_8) (void *t, bus_space_handle_t bsh1, \
void __bs_c(f,_bs_c_8) (bus_space_tag_t t, bus_space_handle_t bsh1, \
bus_size_t offset1, bus_space_handle_t bsh2, \
bus_size_t offset2, bus_size_t count);
@ -712,6 +738,9 @@ bs_c_2_proto(f); \
bs_c_4_proto(f); \
bs_c_8_proto(f);
void generic_bs_unimplemented(void);
#define BS_UNIMPLEMENTED (void *)generic_bs_unimplemented
#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF

2
sys/arm/lpc/files.lpc
View File

@ -1,9 +1,9 @@
# $FreeBSD$
arm/arm/bus_space_base.c standard
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_arm9.S standard
arm/arm/cpufunc_asm_armv5.S standard
arm/lpc/lpc_machdep.c standard
arm/lpc/lpc_space.c standard
arm/lpc/lpc_pwr.c standard
arm/lpc/lpc_intc.c standard
arm/lpc/lpc_timer.c standard

147
sys/arm/lpc/lpc_space.c
View File

@ -1,147 +0,0 @@
/*-
* Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus.h>
bs_protos(generic);
bs_protos(generic_armv4);
static struct bus_space _base_tag = {
/* cookie */
NULL,
/* mapping/unmapping */
generic_bs_map,
generic_bs_unmap,
generic_bs_subregion,
/* allocation/deallocation */
generic_bs_alloc,
generic_bs_free,
/* barrier */
generic_bs_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read (multiple) */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
/* read region */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
/* write region */
NULL,
NULL,
NULL,
NULL,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
/* set region */
NULL,
NULL,
NULL,
NULL,
/* copy */
NULL,
NULL,
NULL,
NULL,
/* read stream (single) */
NULL,
NULL,
NULL,
NULL,
/* read multiple stream */
NULL,
generic_armv4_bs_rm_2,
NULL,
NULL,
/* read region stream */
NULL,
NULL,
NULL,
NULL,
/* write stream (single) */
NULL,
NULL,
NULL,
NULL,
/* write multiple stream */
NULL,
generic_armv4_bs_wm_2,
NULL,
NULL,
/* write region stream */
NULL,
NULL,
NULL,
NULL,
};
bus_space_tag_t fdtbus_bs_tag = &_base_tag;

162
sys/arm/mv/bus_space.c
View File

@ -1,162 +0,0 @@
/*-
* Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
* All rights reserved.
*
* Developed by Semihalf.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of MARVELL nor the names of contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus.h>
/*
* Bus space functions for Marvell SoC family
*/
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
bs_protos(generic_armv4);
/*
* The bus space tag. This is constant for all instances, so
* we never have to explicitly "create" it.
*/
static struct bus_space _base_tag = {
/* cookie */
(void *) 0,
/* mapping/unmapping */
generic_bs_map,
generic_bs_unmap,
generic_bs_subregion,
/* allocation/deallocation */
generic_bs_alloc,
generic_bs_free,
/* barrier */
generic_bs_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
/* read region */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
/* write region */
NULL,
NULL,
NULL,
NULL,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
/* set region */
NULL,
NULL,
NULL,
NULL,
/* copy */
NULL,
NULL,
NULL,
NULL,
/* read stream (single) */
NULL,
NULL,
NULL,
NULL,
/* read multiple stream */
NULL,
generic_armv4_bs_rm_2, /* bus_space_read_multi_stream_2 */
NULL,
NULL,
/* read region stream */
NULL,
NULL,
NULL,
NULL,
/* write stream (single) */
NULL,
NULL,
NULL,
NULL,
/* write multiple stream */
NULL,
generic_armv4_bs_wm_2, /* bus_space_write_multi_stream_2 */
NULL,
NULL,
/* write region stream */
NULL,
NULL,
NULL,
NULL
};
bus_space_tag_t fdtbus_bs_tag = &_base_tag;

2
sys/arm/mv/files.mv
View File

@ -12,6 +12,7 @@
# - JTAG/ICE
# - Vector Floating Point (VFP) unit
#
arm/arm/bus_space_base.c standard
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_arm10.S standard
arm/arm/cpufunc_asm_arm11.S standard
@ -21,7 +22,6 @@ arm/arm/cpufunc_asm_armv7.S standard
arm/arm/cpufunc_asm_sheeva.S standard
arm/arm/cpufunc_asm_pj4b.S standard
arm/mv/bus_space.c standard
arm/mv/gpio.c standard
arm/mv/mv_common.c standard
arm/mv/mv_localbus.c standard

2
sys/arm/rockchip/files.rk30xx
View File

@ -11,7 +11,7 @@ arm/arm/cpufunc_asm_armv7.S standard
arm/arm/gic.c standard
arm/arm/mpcore_timer.c standard
arm/arm/bus_space-v6.c standard
arm/arm/bus_space_base.c standard
arm/rockchip/rk30xx_common.c standard
arm/rockchip/rk30xx_machdep.c standard
arm/rockchip/rk30xx_pmu.c standard

2
sys/arm/samsung/exynos/files.exynos5
View File

@ -9,7 +9,7 @@ arm/arm/cpufunc_asm_arm10.S standard
arm/arm/cpufunc_asm_arm11.S standard
arm/arm/cpufunc_asm_armv7.S standard
arm/arm/bus_space-v6.c standard
arm/arm/bus_space_base.c standard
arm/arm/gic.c standard
arm/arm/generic_timer.c standard

2
sys/arm/samsung/s3c2xx0/files.s3c2xx0
View File

@ -1,4 +1,5 @@
# $FreeBSD$
arm/arm/bus_space_base.c standard
arm/arm/bus_space_asm_generic.S standard
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_arm9.S standard
@ -6,7 +7,6 @@ arm/samsung/s3c2xx0/board_ln2410sbc.c optional board_ln2410sbc
arm/samsung/s3c2xx0/s3c24x0_rtc.c standard
arm/samsung/s3c2xx0/s3c24x0_machdep.c standard
arm/samsung/s3c2xx0/s3c24x0.c standard
arm/samsung/s3c2xx0/s3c2xx0_space.c standard
arm/samsung/s3c2xx0/s3c24x0_clk.c standard
arm/samsung/s3c2xx0/uart_bus_s3c2410.c optional uart
arm/samsung/s3c2xx0/uart_cpu_s3c2410.c optional uart

57
sys/arm/samsung/s3c2xx0/s3c24x0.c
View File

@ -56,6 +56,8 @@ __FBSDID("$FreeBSD$");
#define S3C2XX0_XTAL_CLK 12000000
bus_space_tag_t s3c2xx0_bs_tag;
#define IPL_LEVELS 13
u_int irqmasks[IPL_LEVELS];
@ -349,7 +351,7 @@ s3c24x0_alloc_resource(device_t bus, device_t child, int type, int *rid,
panic("Unable to map address space %#lX-%#lX", start,
end);
rman_set_bustag(res, &s3c2xx0_bs_tag);
rman_set_bustag(res, s3c2xx0_bs_tag);
rman_set_bushandle(res, start);
if (flags & RF_ACTIVE) {
if (bus_activate_resource(child, type, *rid, res)) {
@ -442,8 +444,9 @@ s3c24x0_attach(device_t dev)
unsigned int i, j;
u_long irqmax;
s3c2xx0_bs_tag = arm_base_bs_tag;
s3c2xx0_softc = &(sc->sc_sx);
sc->sc_sx.sc_iot = iot = &s3c2xx0_bs_tag;
sc->sc_sx.sc_iot = iot = s3c2xx0_bs_tag;
s3c2xx0_softc->s3c2xx0_irq_rman.rm_type = RMAN_ARRAY;
s3c2xx0_softc->s3c2xx0_irq_rman.rm_descr = "S3C24X0 IRQs";
s3c2xx0_softc->s3c2xx0_mem_rman.rm_type = RMAN_ARRAY;
@ -641,7 +644,7 @@ cpu_reset(void)
{
(void) disable_interrupts(PSR_I|PSR_F);
bus_space_write_4(&s3c2xx0_bs_tag, s3c2xx0_softc->sc_wdt_ioh, WDT_WTCON,
bus_space_write_4(s3c2xx0_bs_tag, s3c2xx0_softc->sc_wdt_ioh, WDT_WTCON,
WTCON_ENABLE | WTCON_CLKSEL_16 | WTCON_ENRST);
for(;;);
}
@ -651,9 +654,9 @@ s3c24x0_sleep(int mode __unused)
{
int reg;
reg = bus_space_read_4(&s3c2xx0_bs_tag, s3c2xx0_softc->sc_clkman_ioh,
reg = bus_space_read_4(s3c2xx0_bs_tag, s3c2xx0_softc->sc_clkman_ioh,
CLKMAN_CLKCON);
bus_space_write_4(&s3c2xx0_bs_tag, s3c2xx0_softc->sc_clkman_ioh,
bus_space_write_4(s3c2xx0_bs_tag, s3c2xx0_softc->sc_clkman_ioh,
CLKMAN_CLKCON, reg | CLKCON_IDLE);
}
@ -664,15 +667,15 @@ arm_get_next_irq(int last __unused)
uint32_t intpnd;
int irq, subirq;
if ((irq = bus_space_read_4(&s3c2xx0_bs_tag,
if ((irq = bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTOFFSET)) != 0) {
/* Clear the pending bit */
intpnd = bus_space_read_4(&s3c2xx0_bs_tag,
intpnd = bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTPND);
bus_space_write_4(&s3c2xx0_bs_tag, s3c2xx0_softc->sc_intctl_ioh,
bus_space_write_4(s3c2xx0_bs_tag, s3c2xx0_softc->sc_intctl_ioh,
INTCTL_SRCPND, intpnd);
bus_space_write_4(&s3c2xx0_bs_tag, s3c2xx0_softc->sc_intctl_ioh,
bus_space_write_4(s3c2xx0_bs_tag, s3c2xx0_softc->sc_intctl_ioh,
INTCTL_INTPND, intpnd);
switch (irq) {
@ -682,9 +685,9 @@ arm_get_next_irq(int last __unused)
case S3C24X0_INT_UART2:
/* Find the sub IRQ */
subirq = 0x7ff;
subirq &= bus_space_read_4(&s3c2xx0_bs_tag,
subirq &= bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_SUBSRCPND);
subirq &= ~(bus_space_read_4(&s3c2xx0_bs_tag,
subirq &= ~(bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTSUBMSK));
if (subirq == 0)
return (irq);
@ -692,7 +695,7 @@ arm_get_next_irq(int last __unused)
subirq = ffs(subirq) - 1;
/* Clear the sub irq pending bit */
bus_space_write_4(&s3c2xx0_bs_tag,
bus_space_write_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_SUBSRCPND,
(1 << subirq));
@ -716,9 +719,9 @@ arm_get_next_irq(int last __unused)
case S3C24X0_INT_8_23:
/* Find the external interrupt being called */
subirq = 0x7fffff;
subirq &= bus_space_read_4(&s3c2xx0_bs_tag,
subirq &= bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_gpio_ioh, GPIO_EINTPEND);
subirq &= ~bus_space_read_4(&s3c2xx0_bs_tag,
subirq &= ~bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_gpio_ioh, GPIO_EINTMASK);
if (subirq == 0)
return (irq);
@ -726,7 +729,7 @@ arm_get_next_irq(int last __unused)
subirq = ffs(subirq) - 1;
/* Clear the external irq pending bit */
bus_space_write_4(&s3c2xx0_bs_tag,
bus_space_write_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_gpio_ioh, GPIO_EINTPEND,
(1 << subirq));
@ -748,22 +751,22 @@ arm_mask_irq(uintptr_t irq)
irq -= S3C24X0_EXTIRQ_MIN;
}
if (irq < S3C24X0_SUBIRQ_MIN) {
mask = bus_space_read_4(&s3c2xx0_bs_tag,
mask = bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTMSK);
mask |= (1 << irq);
bus_space_write_4(&s3c2xx0_bs_tag,
bus_space_write_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTMSK, mask);
} else if (irq < S3C24X0_EXTIRQ_MIN) {
mask = bus_space_read_4(&s3c2xx0_bs_tag,
mask = bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTSUBMSK);
mask |= (1 << (irq - S3C24X0_SUBIRQ_MIN));
bus_space_write_4(&s3c2xx0_bs_tag,
bus_space_write_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTSUBMSK, mask);
} else {
mask = bus_space_read_4(&s3c2xx0_bs_tag,
mask = bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_gpio_ioh, GPIO_EINTMASK);
mask |= (1 << (irq - S3C24X0_EXTIRQ_MIN));
bus_space_write_4(&s3c2xx0_bs_tag,
bus_space_write_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, GPIO_EINTMASK, mask);
}
}
@ -778,22 +781,22 @@ arm_unmask_irq(uintptr_t irq)
irq -= S3C24X0_EXTIRQ_MIN;
}
if (irq < S3C24X0_SUBIRQ_MIN) {
mask = bus_space_read_4(&s3c2xx0_bs_tag,
mask = bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTMSK);
mask &= ~(1 << irq);
bus_space_write_4(&s3c2xx0_bs_tag,
bus_space_write_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTMSK, mask);
} else if (irq < S3C24X0_EXTIRQ_MIN) {
mask = bus_space_read_4(&s3c2xx0_bs_tag,
mask = bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTSUBMSK);
mask &= ~(1 << (irq - S3C24X0_SUBIRQ_MIN));
bus_space_write_4(&s3c2xx0_bs_tag,
bus_space_write_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, INTCTL_INTSUBMSK, mask);
} else {
mask = bus_space_read_4(&s3c2xx0_bs_tag,
mask = bus_space_read_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_gpio_ioh, GPIO_EINTMASK);
mask &= ~(1 << (irq - S3C24X0_EXTIRQ_MIN));
bus_space_write_4(&s3c2xx0_bs_tag,
bus_space_write_4(s3c2xx0_bs_tag,
s3c2xx0_softc->sc_intctl_ioh, GPIO_EINTMASK, mask);
}
}

165
sys/arm/samsung/s3c2xx0/s3c2xx0_space.c
View File

@ -1,165 +0,0 @@
/* $NetBSD: s3c2xx0_space.c,v 1.7 2005/11/24 13:08:32 yamt Exp $ */
/*
* Copyright (c) 2002 Fujitsu Component Limited
* Copyright (c) 2002 Genetec Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of The Fujitsu Component Limited nor the name of
* Genetec corporation may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
* CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
* CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/* derived from sa11x0_io.c */
/*
* Copyright (c) 1997 Mark Brinicombe.
* Copyright (c) 1997 Causality Limited.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Ichiro FUKUHARA.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Mark Brinicombe.
* 4. The name of the company nor the name of the author may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* bus_space functions for Samsung S3C2800/2400/2410.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <vm/vm.h>
#include <vm/vm_kern.h>
#include <vm/pmap.h>
#include <vm/vm_page.h>
#include <vm/vm_extern.h>
#include <machine/bus.h>
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
bs_protos(generic_armv4);
struct bus_space s3c2xx0_bs_tag = {
/* cookie */
(void *) 0,
/* mapping/unmapping */
generic_bs_map,
generic_bs_unmap,
generic_bs_subregion,
/* allocation/deallocation */
generic_bs_alloc, /* not implemented */
generic_bs_free, /* not implemented */
/* barrier */
generic_bs_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
/* read region */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
/* write region */
generic_bs_wr_1,
generic_armv4_bs_wr_2,
generic_bs_wr_4,
NULL,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
/* set region */
generic_bs_sr_1,
generic_armv4_bs_sr_2,
NULL,
NULL,
/* copy */
NULL,
generic_armv4_bs_c_2,
NULL,
NULL,
};

2
sys/arm/samsung/s3c2xx0/s3c2xx0var.h
View File

@ -74,7 +74,7 @@ struct s3c2xx0_ivar {
typedef void *s3c2xx0_chipset_tag_t;
extern struct bus_space s3c2xx0_bs_tag;
extern bus_space_tag_t s3c2xx0_bs_tag;
extern struct s3c2xx0_softc *s3c2xx0_softc;
extern struct arm32_bus_dma_tag s3c2xx0_bus_dma;

4
sys/arm/samsung/s3c2xx0/uart_cpu_s3c2410.c
View File

@ -61,7 +61,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
di->ops = uart_getops(&uart_s3c2410_class);
di->bas.chan = 0;
di->bas.bst = &s3c2xx0_bs_tag;
di->bas.bst = s3c2xx0_bs_tag;
di->bas.bsh = s3c2410_uart_vaddr;
di->bas.regshft = 0;
di->bas.rclk = s3c2410_pclk;
@ -69,7 +69,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
di->databits = 8;
di->stopbits = 1;
di->parity = UART_PARITY_NONE;
uart_bus_space_io = &s3c2xx0_bs_tag;
uart_bus_space_io = s3c2xx0_bs_tag;
uart_bus_space_mem = NULL;
return (0);

2
sys/arm/ti/files.ti
View File

@ -2,7 +2,7 @@
kern/kern_clocksource.c standard
arm/arm/bus_space-v6.c standard
arm/arm/bus_space_base.c standard
arm/arm/bus_space_generic.c standard
arm/arm/bus_space_asm_generic.S standard
arm/arm/cpufunc_asm_armv5.S standard

115
sys/arm/versatile/bus_space.c
View File

@ -1,115 +0,0 @@
/*-
* Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
* All rights reserved.
*
* Developed by Semihalf.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of MARVELL nor the names of contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus.h>
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
bs_protos(generic_armv4);
struct bus_space _base_tag = {
/* cookie */
.bs_cookie = (void *) 0,
/* mapping/unmapping */
.bs_map = generic_bs_map,
.bs_unmap = generic_bs_unmap,
.bs_subregion = generic_bs_subregion,
/* allocation/deallocation */
.bs_alloc = generic_bs_alloc,
.bs_free = generic_bs_free,
/* barrier */
.bs_barrier = generic_bs_barrier,
/* read (single) */
.bs_r_1 = generic_bs_r_1,
.bs_r_2 = generic_armv4_bs_r_2,
.bs_r_4 = generic_bs_r_4,
.bs_r_8 = NULL,
/* read multiple */
.bs_rm_1 = generic_bs_rm_1,
.bs_rm_2 = generic_armv4_bs_rm_2,
.bs_rm_4 = generic_bs_rm_4,
.bs_rm_8 = NULL,
/* read region */
.bs_rr_1 = generic_bs_rr_1,
.bs_rr_2 = generic_armv4_bs_rr_2,
.bs_rr_4 = generic_bs_rr_4,
.bs_rr_8 = NULL,
/* write (single) */
.bs_w_1 = generic_bs_w_1,
.bs_w_2 = generic_armv4_bs_w_2,
.bs_w_4 = generic_bs_w_4,
.bs_w_8 = NULL,
/* write multiple */
.bs_wm_1 = generic_bs_wm_1,
.bs_wm_2 = generic_armv4_bs_wm_2,
.bs_wm_4 = generic_bs_wm_4,
.bs_wm_8 = NULL,
/* write region */
.bs_wr_1 = generic_bs_wr_1,
.bs_wr_2 = generic_armv4_bs_wr_2,
.bs_wr_4 = generic_bs_wr_4,
.bs_wr_8 = NULL,
/* set multiple */
/* XXX not implemented */
/* set region */
.bs_sr_1 = NULL,
.bs_sr_2 = generic_armv4_bs_sr_2,
.bs_sr_4 = generic_bs_sr_4,
.bs_sr_8 = NULL,
/* copy */
.bs_c_1 = NULL,
.bs_c_2 = generic_armv4_bs_c_2,
.bs_c_4 = NULL,
.bs_c_8 = NULL,
};
bus_space_tag_t fdtbus_bs_tag = &_base_tag;

3
sys/arm/versatile/files.versatile
View File

@ -1,5 +1,6 @@
# $FreeBSD$
arm/arm/bus_space_base.c standard
arm/arm/bus_space_asm_generic.S standard
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_arm11.S standard
@ -7,14 +8,12 @@ arm/arm/cpufunc_asm_arm11x6.S standard
arm/arm/cpufunc_asm_armv5.S standard
arm/arm/cpufunc_asm_armv6.S standard
arm/versatile/bus_space.c standard
arm/versatile/pl050.c optional sc
arm/versatile/sp804.c standard
arm/versatile/versatile_machdep.c standard
arm/versatile/versatile_clcd.c optional sc
arm/versatile/versatile_common.c standard
arm/versatile/versatile_pci.c optional pci
arm/versatile/versatile_pci_bus_space.c optional pci
arm/versatile/versatile_sic.c standard
arm/versatile/versatile_timer.c standard
arm/versatile/if_smc_fdt.c optional smc

4
sys/arm/versatile/versatile_pci.c
View File

@ -53,8 +53,6 @@ __FBSDID("$FreeBSD$");
#include <machine/bus.h>
#include <machine/fdt.h>
#include <arm/versatile/versatile_pci_bus_space.h>
#define MEM_SYS 0
#define MEM_CORE 1
#define MEM_BASE 2
@ -355,7 +353,7 @@ versatile_pci_activate_resource(device_t bus, device_t child, int type, int rid,
vaddr = (vm_offset_t)pmap_mapdev(rman_get_start(r),
rman_get_size(r));
rman_set_bushandle(r, vaddr);
rman_set_bustag(r, versatile_bus_space_pcimem);
rman_set_bustag(r, arm_base_bs_tag);
res = rman_activate_resource(r);
break;
case SYS_RES_IRQ:

153
sys/arm/versatile/versatile_pci_bus_space.c
View File

@ -1,153 +0,0 @@
/*-
* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/endian.h>
#include <machine/bus.h>
#include <arm/versatile/versatile_pci_bus_space.h>
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
bs_protos(generic_armv4);
/*
* Bus space that handles offsets in word for 1/2 bytes read/write access.
* Byte order of values is handled by device drivers itself.
*/
static struct bus_space bus_space_pcimem = {
/* cookie */
(void *) 0,
/* mapping/unmapping */
generic_bs_map,
generic_bs_unmap,
generic_bs_subregion,
/* allocation/deallocation */
NULL,
NULL,
/* barrier */
generic_bs_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
/* read region */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
/* write region */
generic_bs_wr_1,
generic_armv4_bs_wr_2,
generic_bs_wr_4,
NULL,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
/* set region */
NULL,
NULL,
generic_bs_sr_4,
NULL,
/* copy */
NULL,
NULL,
NULL,
NULL,
/* read (single) stream */
NULL,
NULL,
NULL,
NULL,
/* read multiple stream */
NULL,
NULL,
NULL,
NULL,
/* read region stream */
NULL,
NULL,
NULL,
NULL,
/* write (single) stream */
NULL,
NULL,
NULL,
NULL,
/* write multiple stream */
NULL,
NULL,
NULL,
NULL,
/* write region stream */
NULL,
NULL,
NULL,
NULL,
};
bus_space_tag_t versatile_bus_space_pcimem = &bus_space_pcimem;

35
sys/arm/versatile/versatile_pci_bus_space.h
View File

@ -1,35 +0,0 @@
/*-
* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef __VERSATILE_PCI_BUS_SPACEH__
#define __VERSATILE_PCI_BUS_SPACEH__
extern bus_space_tag_t versatile_bus_space_pcimem;
#endif /* __VERSATILE_PCI_BUS_SPACEH__ */

2
sys/arm/xilinx/files.zynq7
View File

@ -5,6 +5,7 @@
kern/kern_clocksource.c standard
arm/arm/bus_space_base.c standard
arm/arm/bus_space_generic.c standard
arm/arm/bus_space_asm_generic.S standard
arm/arm/cpufunc_asm_armv5.S standard
@ -18,7 +19,6 @@ arm/arm/pl310.c standard
arm/xilinx/zy7_machdep.c standard
arm/xilinx/zy7_l2cache.c standard
arm/xilinx/zy7_bus_space.c standard
arm/xilinx/zy7_slcr.c standard
arm/xilinx/zy7_devcfg.c standard
arm/xilinx/zy7_mp.c optional smp

115
sys/arm/xilinx/zy7_bus_space.c
View File

@ -1,115 +0,0 @@
/*-
* Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
* All rights reserved.
*
* Developed by Semihalf.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of MARVELL nor the names of contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus.h>
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
bs_protos(generic_armv4);
struct bus_space _base_tag = {
/* cookie */
.bs_cookie = (void *) 0,
/* mapping/unmapping */
.bs_map = generic_bs_map,
.bs_unmap = generic_bs_unmap,
.bs_subregion = generic_bs_subregion,
/* allocation/deallocation */
.bs_alloc = generic_bs_alloc,
.bs_free = generic_bs_free,
/* barrier */
.bs_barrier = generic_bs_barrier,
/* read (single) */
.bs_r_1 = generic_bs_r_1,
.bs_r_2 = generic_armv4_bs_r_2,
.bs_r_4 = generic_bs_r_4,
.bs_r_8 = NULL,
/* read multiple */
.bs_rm_1 = generic_bs_rm_1,
.bs_rm_2 = generic_armv4_bs_rm_2,
.bs_rm_4 = generic_bs_rm_4,
.bs_rm_8 = NULL,
/* read region */
.bs_rr_1 = generic_bs_rr_1,
.bs_rr_2 = generic_armv4_bs_rr_2,
.bs_rr_4 = generic_bs_rr_4,
.bs_rr_8 = NULL,
/* write (single) */
.bs_w_1 = generic_bs_w_1,
.bs_w_2 = generic_armv4_bs_w_2,
.bs_w_4 = generic_bs_w_4,
.bs_w_8 = NULL,
/* write multiple */
.bs_wm_1 = generic_bs_wm_1,
.bs_wm_2 = generic_armv4_bs_wm_2,
.bs_wm_4 = generic_bs_wm_4,
.bs_wm_8 = NULL,
/* write region */
.bs_wr_1 = generic_bs_wr_1,
.bs_wr_2 = generic_armv4_bs_wr_2,
.bs_wr_4 = generic_bs_wr_4,
.bs_wr_8 = NULL,
/* set multiple */
/* XXX not implemented */
/* set region */
.bs_sr_1 = NULL,
.bs_sr_2 = generic_armv4_bs_sr_2,
.bs_sr_4 = generic_bs_sr_4,
.bs_sr_8 = NULL,
/* copy */
.bs_c_1 = NULL,
.bs_c_2 = generic_armv4_bs_c_2,
.bs_c_4 = NULL,
.bs_c_8 = NULL,
};
bus_space_tag_t fdtbus_bs_tag = &_base_tag;

2
sys/arm/xscale/i80321/ep80219_machdep.c
View File

@ -312,7 +312,7 @@ initarm(struct arm_boot_params *abp)
* registers.
*/
i80321_calibrate_delay();
i80321_sdram_bounds(&obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
i80321_sdram_bounds(obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
&memstart, &memsize);
physmem = memsize / PAGE_SIZE;
cninit();

1
sys/arm/xscale/i80321/files.ep80219
View File

@ -6,7 +6,6 @@
arm/xscale/i80321/iq80321.c standard
arm/xscale/i80321/ep80219_machdep.c standard
arm/xscale/i80321/obio.c standard
arm/xscale/i80321/obio_space.c standard
arm/xscale/i80321/uart_cpu_i80321.c optional uart
arm/xscale/i80321/uart_bus_i80321.c optional uart
dev/uart/uart_dev_ns8250.c optional uart

1
sys/arm/xscale/i80321/files.i80219
View File

@ -2,6 +2,7 @@
#
# IOP Specific
#
arm/arm/bus_space_base.c standard
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_xscale.S standard
arm/xscale/i80321/i80321.c standard

1
sys/arm/xscale/i80321/files.i80321
View File

@ -1,4 +1,5 @@
#$FreeBSD$
arm/arm/bus_space_base.c standard
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_xscale.S standard
arm/xscale/i80321/i80321.c standard

1
sys/arm/xscale/i80321/files.iq31244
View File

@ -3,7 +3,6 @@ arm/xscale/i80321/iq80321.c standard
arm/xscale/i80321/iq31244_machdep.c standard
arm/xscale/i80321/iq31244_7seg.c optional iq31244_7seg
arm/xscale/i80321/obio.c standard
arm/xscale/i80321/obio_space.c standard
arm/xscale/i80321/uart_cpu_i80321.c optional uart
arm/xscale/i80321/uart_bus_i80321.c optional uart
dev/uart/uart_dev_ns8250.c optional uart

159
sys/arm/xscale/i80321/i80321_space.c
View File

@ -63,134 +63,21 @@ __FBSDID("$FreeBSD$");
bs_protos(i80321);
bs_protos(i80321_io);
bs_protos(i80321_mem);
bs_protos(generic);
bs_protos(generic_armv4);
/*
* Template bus_space -- copied, and the bits that are NULL are
* filled in.
*/
const struct bus_space i80321_bs_tag_template = {
/* cookie */
(void *) 0,
/* mapping/unmapping */
NULL,
NULL,
i80321_bs_subregion,
/* allocation/deallocation */
NULL,
NULL,
/* barrier */
i80321_bs_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
/* read region */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
/* write region */
NULL,
generic_armv4_bs_wr_2,
generic_bs_wr_4,
NULL,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
/* set region */
NULL,
generic_armv4_bs_sr_2,
generic_bs_sr_4,
NULL,
/* copy */
NULL,
generic_armv4_bs_c_2,
NULL,
NULL,
/* read (single) stream */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple stream */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
/* read region stream */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
/* write (single) stream */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple stream */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
/* write region stream */
NULL,
generic_armv4_bs_wr_2,
generic_bs_wr_4,
NULL,
};
void
i80321_bs_init(bus_space_tag_t bs, void *cookie)
{
*bs = i80321_bs_tag_template;
bs->bs_cookie = cookie;
*bs = *arm_base_bs_tag;
bs->bs_privdata = cookie;
}
void
i80321_io_bs_init(bus_space_tag_t bs, void *cookie)
{
*bs = i80321_bs_tag_template;
bs->bs_cookie = cookie;
*bs = *arm_base_bs_tag;
bs->bs_privdata = cookie;
bs->bs_map = i80321_io_bs_map;
bs->bs_unmap = i80321_io_bs_unmap;
@ -203,8 +90,8 @@ void
i80321_mem_bs_init(bus_space_tag_t bs, void *cookie)
{
*bs = i80321_bs_tag_template;
bs->bs_cookie = cookie;
*bs = *arm_base_bs_tag;
bs->bs_privdata = cookie;
bs->bs_map = i80321_mem_bs_map;
bs->bs_unmap = i80321_mem_bs_unmap;
@ -216,7 +103,7 @@ i80321_mem_bs_init(bus_space_tag_t bs, void *cookie)
/* *** Routines shared by i80321, PCI IO, and PCI MEM. *** */
int
i80321_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
i80321_bs_subregion(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t size, bus_space_handle_t *nbshp)
{
@ -225,7 +112,7 @@ i80321_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
}
void
i80321_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
i80321_bs_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t len, int flags)
{
@ -236,7 +123,7 @@ i80321_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
extern struct i80321_softc *i80321_softc;
int
i80321_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
i80321_io_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size, int flags,
bus_space_handle_t *bshp)
{
struct i80321_softc *sc = i80321_softc;
@ -264,14 +151,14 @@ i80321_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
}
void
i80321_io_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
i80321_io_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size)
{
/* Nothing to do. */
}
int
i80321_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
i80321_io_bs_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend,
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
bus_addr_t *bpap, bus_space_handle_t *bshp)
{
@ -280,7 +167,7 @@ i80321_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
}
void
i80321_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
i80321_io_bs_free(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size)
{
panic("i80321_io_bs_free(): not implemented");
@ -290,33 +177,23 @@ i80321_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
/* *** Routines for PCI MEM. *** */
extern int badaddr_read(void *, int, void *);
int
i80321_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
i80321_mem_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size, int flags,
bus_space_handle_t *bshp)
{
vm_paddr_t pa, endpa;
pa = trunc_page(bpa);
endpa = round_page(bpa + size);
*bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa);
*bshp = (vm_offset_t)pmap_mapdev(bpa, size);
return (0);
}
void
i80321_mem_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
i80321_mem_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size)
{
vm_offset_t va, endva;
va = trunc_page((vm_offset_t)t);
endva = va + round_page(size);
/* Free the kernel virtual mapping. */
kva_free(va, endva - va);
pmap_unmapdev((vm_offset_t)h, size);
}
int
i80321_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
i80321_mem_bs_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend,
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
bus_addr_t *bpap, bus_space_handle_t *bshp)
{
@ -325,7 +202,7 @@ i80321_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
}
void
i80321_mem_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
i80321_mem_bs_free(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size)
{
panic("i80321_mem_bs_free(): not implemented");

2
sys/arm/xscale/i80321/iq31244_machdep.c
View File

@ -313,7 +313,7 @@ initarm(struct arm_boot_params *abp)
* registers.
*/
i80321_calibrate_delay();
i80321_sdram_bounds(&obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
i80321_sdram_bounds(obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
&memstart, &memsize);
physmem = memsize / PAGE_SIZE;
cninit();

5
sys/arm/xscale/i80321/obio.c
View File

@ -58,6 +58,8 @@ __FBSDID("$FreeBSD$");
#include <arm/xscale/i80321/iq80321reg.h>
#include <arm/xscale/i80321/obiovar.h>
bus_space_tag_t obio_bs_tag;
int obio_probe(device_t);
int obio_attach(device_t);
@ -72,7 +74,8 @@ obio_attach(device_t dev)
{
struct obio_softc *sc = device_get_softc(dev);
sc->oba_st = &obio_bs_tag;
obio_bs_tag = arm_base_bs_tag;
sc->oba_st = obio_bs_tag;
sc->oba_addr = IQ80321_OBIO_BASE;
sc->oba_size = IQ80321_OBIO_SIZE;
sc->oba_rman.rm_type = RMAN_ARRAY;

128
sys/arm/xscale/i80321/obio_space.c
View File

@ -1,128 +0,0 @@
/* $NetBSD: obio_space.c,v 1.6 2003/07/15 00:25:05 lukem Exp $ */
/*-
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* bus_space functions for IQ80321 on-board devices
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <machine/bus.h>
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
bs_protos(generic_armv4);
/*
* The obio bus space tag. This is constant for all instances, so
* we never have to explicitly "create" it.
*/
struct bus_space obio_bs_tag = {
/* cookie */
(void *) 0,
/* mapping/unmapping */
generic_bs_map,
generic_bs_unmap,
generic_bs_subregion,
/* allocation/deallocation */
generic_bs_alloc,
generic_bs_free,
/* barrier */
generic_bs_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple */
generic_bs_rm_1,
NULL,
NULL,
NULL,
/* read region */
generic_bs_rr_1,
NULL,
NULL,
NULL,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple */
generic_bs_wm_1,
NULL,
NULL,
NULL,
/* write region */
NULL,
NULL,
NULL,
NULL,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
/* set region */
NULL,
NULL,
NULL,
NULL,
/* copy */
NULL,
NULL,
NULL,
NULL,
};

2
sys/arm/xscale/i80321/obiovar.h
View File

@ -53,6 +53,6 @@ struct obio_softc {
struct rman oba_irq_rman;
};
extern struct bus_space obio_bs_tag;
extern bus_space_tag_t obio_bs_tag;
#endif /* _IQ80321_OBIOVAR_H_ */

4
sys/arm/xscale/i80321/uart_cpu_i80321.c
View File

@ -53,14 +53,14 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
{
di->ops = uart_getops(&uart_ns8250_class);
di->bas.chan = 0;
di->bas.bst = &obio_bs_tag;
di->bas.bst = obio_bs_tag;
di->bas.regshft = 0;
di->bas.rclk = 0;
di->baudrate = 115200;
di->databits = 8;
di->stopbits = 1;
di->parity = UART_PARITY_NONE;
uart_bus_space_io = &obio_bs_tag;
uart_bus_space_io = obio_bs_tag;
uart_bus_space_mem = NULL;
di->bas.bsh = 0xfe800000;
return (0);

2
sys/arm/xscale/i8134x/crb_machdep.c
View File

@ -293,7 +293,7 @@ initarm(struct arm_boot_params *abp)
cpu_setup("");
i80321_calibrate_delay();
i81342_sdram_bounds(&obio_bs_tag, IOP34X_VADDR, &memstart, &memsize);
i81342_sdram_bounds(obio_bs_tag, IOP34X_VADDR, &memstart, &memsize);
physmem = memsize / PAGE_SIZE;
cninit();
/* Set stack for exception handlers */

2
sys/arm/xscale/i8134x/files.i81342
View File

@ -1,4 +1,5 @@
# $FreeBSD$
arm/arm/bus_space_base.c standard
arm/arm/bus_space_generic.c standard
arm/arm/cpufunc_asm_xscale.S standard
arm/arm/cpufunc_asm_xscale_c3.S standard
@ -9,7 +10,6 @@ arm/xscale/i8134x/i81342_mcu.c standard
arm/xscale/i8134x/i81342_pci.c optional pci
arm/xscale/i8134x/i81342_space.c standard
arm/xscale/i8134x/obio.c standard
arm/xscale/i8134x/obio_space.c standard
arm/xscale/i8134x/uart_bus_i81342.c optional uart
arm/xscale/i8134x/uart_cpu_i81342.c optional uart
dev/uart/uart_dev_ns8250.c optional uart

149
sys/arm/xscale/i8134x/i81342_space.c
View File

@ -64,134 +64,21 @@ __FBSDID("$FreeBSD$");
bs_protos(i81342);
bs_protos(i81342_io);
bs_protos(i81342_mem);
bs_protos(generic);
bs_protos(generic_armv4);
/*
* Template bus_space -- copied, and the bits that are NULL are
* filled in.
*/
const struct bus_space i81342_bs_tag_template = {
/* cookie */
(void *) 0,
/* mapping/unmapping */
NULL,
NULL,
i81342_bs_subregion,
/* allocation/deallocation */
NULL,
NULL,
/* barrier */
i81342_bs_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
/* read region */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
/* write region */
NULL,
generic_armv4_bs_wr_2,
generic_bs_wr_4,
NULL,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
/* set region */
NULL,
generic_armv4_bs_sr_2,
generic_bs_sr_4,
NULL,
/* copy */
NULL,
generic_armv4_bs_c_2,
NULL,
NULL,
/* read (single) stream */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple stream */
generic_bs_rm_1,
generic_armv4_bs_rm_2,
generic_bs_rm_4,
NULL,
/* read region stream */
generic_bs_rr_1,
generic_armv4_bs_rr_2,
generic_bs_rr_4,
NULL,
/* write (single) stream */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple stream */
generic_bs_wm_1,
generic_armv4_bs_wm_2,
generic_bs_wm_4,
NULL,
/* write region stream */
NULL,
generic_armv4_bs_wr_2,
generic_bs_wr_4,
NULL,
};
void
i81342_bs_init(bus_space_tag_t bs, void *cookie)
{
*bs = i81342_bs_tag_template;
bs->bs_cookie = cookie;
*bs = *arm_base_bs_tag;
bs->bs_privdata = cookie;
}
void
i81342_io_bs_init(bus_space_tag_t bs, void *cookie)
{
*bs = i81342_bs_tag_template;
bs->bs_cookie = cookie;
*bs = *arm_base_bs_tag;
bs->bs_privdata = cookie;
bs->bs_map = i81342_io_bs_map;
bs->bs_unmap = i81342_io_bs_unmap;
@ -204,8 +91,8 @@ void
i81342_mem_bs_init(bus_space_tag_t bs, void *cookie)
{
*bs = i81342_bs_tag_template;
bs->bs_cookie = cookie;
*bs = *arm_base_bs_tag;
bs->bs_privdata = cookie;
bs->bs_map = i81342_mem_bs_map;
bs->bs_unmap = i81342_mem_bs_unmap;
@ -217,7 +104,7 @@ i81342_mem_bs_init(bus_space_tag_t bs, void *cookie)
/* *** Routines shared by i81342, PCI IO, and PCI MEM. *** */
int
i81342_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
i81342_bs_subregion(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t size, bus_space_handle_t *nbshp)
{
@ -226,7 +113,7 @@ i81342_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
}
void
i81342_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
i81342_bs_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t len, int flags)
{
@ -236,7 +123,7 @@ i81342_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
/* *** Routines for PCI IO. *** */
int
i81342_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
i81342_io_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size, int flags,
bus_space_handle_t *bshp)
{
@ -245,14 +132,14 @@ i81342_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
}
void
i81342_io_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
i81342_io_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size)
{
/* Nothing to do. */
}
int
i81342_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
i81342_io_bs_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend,
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
bus_addr_t *bpap, bus_space_handle_t *bshp)
{
@ -261,7 +148,7 @@ i81342_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
}
void
i81342_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
i81342_io_bs_free(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size)
{
panic("i81342_io_bs_free(): not implemented");
@ -272,10 +159,10 @@ i81342_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
extern int badaddr_read(void *, int, void *);
static vm_offset_t allocable = 0xe1000000;
int
i81342_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
i81342_mem_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size, int flags,
bus_space_handle_t *bshp)
{
struct i81342_pci_softc *sc = (struct i81342_pci_softc *)t;
struct i81342_pci_softc *sc = (struct i81342_pci_softc *)tag->bs_privdata;
struct i81342_pci_map *tmp;
vm_offset_t addr, endaddr;
vm_paddr_t paddr;
@ -315,12 +202,12 @@ i81342_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
}
void
i81342_mem_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
i81342_mem_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size)
{
#if 0
vm_offset_t va, endva;
va = trunc_page((vm_offset_t)t);
va = trunc_page((vm_offset_t)h);
endva = va + round_page(size);
/* Free the kernel virtual mapping. */
@ -329,7 +216,7 @@ i81342_mem_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
}
int
i81342_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
i81342_mem_bs_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend,
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
bus_addr_t *bpap, bus_space_handle_t *bshp)
{
@ -338,7 +225,7 @@ i81342_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
}
void
i81342_mem_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
i81342_mem_bs_free(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size)
{
panic("i81342_mem_bs_free(): not implemented");

4
sys/arm/xscale/i8134x/obio.c
View File

@ -56,6 +56,7 @@ __FBSDID("$FreeBSD$");
#include <arm/xscale/i8134x/i81342reg.h>
#include <arm/xscale/i8134x/obiovar.h>
bus_space_tag_t obio_bs_tag;
static int
obio_probe(device_t dev)
@ -68,7 +69,8 @@ obio_attach(device_t dev)
{
struct obio_softc *sc = device_get_softc(dev);
sc->oba_st = &obio_bs_tag;
obio_bs_tag = arm_base_bs_tag;
sc->oba_st = obio_bs_tag;
sc->oba_rman.rm_type = RMAN_ARRAY;
sc->oba_rman.rm_descr = "OBIO I/O";
if (rman_init(&sc->oba_rman) != 0 ||

128
sys/arm/xscale/i8134x/obio_space.c
View File

@ -1,128 +0,0 @@
/* $NetBSD: obio_space.c,v 1.6 2003/07/15 00:25:05 lukem Exp $ */
/*-
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* bus_space functions for IQ80321 on-board devices
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <machine/bus.h>
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
bs_protos(generic_armv4);
/*
* The obio bus space tag. This is constant for all instances, so
* we never have to explicitly "create" it.
*/
struct bus_space obio_bs_tag = {
/* cookie */
(void *) 0,
/* mapping/unmapping */
generic_bs_map,
generic_bs_unmap,
generic_bs_subregion,
/* allocation/deallocation */
generic_bs_alloc,
generic_bs_free,
/* barrier */
generic_bs_barrier,
/* read (single) */
generic_bs_r_1,
generic_armv4_bs_r_2,
generic_bs_r_4,
NULL,
/* read multiple */
generic_bs_rm_1,
NULL,
NULL,
NULL,
/* read region */
generic_bs_rr_1,
NULL,
NULL,
NULL,
/* write (single) */
generic_bs_w_1,
generic_armv4_bs_w_2,
generic_bs_w_4,
NULL,
/* write multiple */
generic_bs_wm_1,
NULL,
NULL,
NULL,
/* write region */
NULL,
NULL,
NULL,
NULL,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
/* set region */
NULL,
NULL,
NULL,
NULL,
/* copy */
NULL,
NULL,
NULL,
NULL,
};

2
sys/arm/xscale/i8134x/obiovar.h
View File

@ -50,6 +50,6 @@ struct obio_softc {
struct rman oba_irq_rman;
};
extern struct bus_space obio_bs_tag;
extern bus_space_tag_t obio_bs_tag;
#endif /* _IQ80321_OBIOVAR_H_ */

4
sys/arm/xscale/i8134x/uart_cpu_i81342.c
View File

@ -54,14 +54,14 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
di->ops = uart_getops(&uart_ns8250_class);
di->bas.chan = 0;
di->bas.bst = &obio_bs_tag;
di->bas.bst = obio_bs_tag;
di->bas.regshft = 2;
di->bas.rclk = 33334000;
di->baudrate = 115200;
di->databits = 8;
di->stopbits = 1;
di->parity = UART_PARITY_NONE;
uart_bus_space_io = &obio_bs_tag;
uart_bus_space_io = obio_bs_tag;
uart_bus_space_mem = NULL;
di->bas.bsh = IOP34X_UART0_VADDR;
return (0);

38
sys/arm/xscale/ixp425/avila_ata.c
View File

@ -147,9 +147,9 @@ struct ata_avila_softc {
static void ata_avila_intr(void *);
bs_protos(ata);
static void ata_bs_rm_2_s(void *, bus_space_handle_t, bus_size_t,
static void ata_bs_rm_2_s(bus_space_tag_t tag, bus_space_handle_t, bus_size_t,
u_int16_t *, bus_size_t);
static void ata_bs_wm_2_s(void *, bus_space_handle_t, bus_size_t,
static void ata_bs_wm_2_s(bus_space_tag_t tag, bus_space_handle_t, bus_size_t,
const u_int16_t *, bus_size_t);
static int
@ -200,7 +200,7 @@ ata_avila_attach(device_t dev)
* XXX probably should just make this generic for
* accessing the expansion bus.
*/
sc->sc_expbus_tag.bs_cookie = sc; /* NB: backpointer */
sc->sc_expbus_tag.bs_privdata = sc; /* NB: backpointer */
/* read single */
sc->sc_expbus_tag.bs_r_1 = ata_bs_r_1,
sc->sc_expbus_tag.bs_r_2 = ata_bs_r_2,
@ -355,25 +355,25 @@ disable_16(struct ata_avila_softc *sc)
}
uint8_t
ata_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o)
ata_bs_r_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
{
struct ata_avila_softc *sc = t;
struct ata_avila_softc *sc = tag->bs_privdata;
return bus_space_read_1(sc->sc_iot, h, o);
}
void
ata_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
ata_bs_w_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, u_int8_t v)
{
struct ata_avila_softc *sc = t;
struct ata_avila_softc *sc = tag->bs_privdata;
bus_space_write_1(sc->sc_iot, h, o, v);
}
uint16_t
ata_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o)
ata_bs_r_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
{
struct ata_avila_softc *sc = t;
struct ata_avila_softc *sc = tag->bs_privdata;
uint16_t v;
enable_16(sc);
@ -383,9 +383,9 @@ ata_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o)
}
void
ata_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
ata_bs_w_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, uint16_t v)
{
struct ata_avila_softc *sc = t;
struct ata_avila_softc *sc = tag->bs_privdata;
enable_16(sc);
bus_space_write_2(sc->sc_iot, h, o, v);
@ -393,10 +393,10 @@ ata_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
}
void
ata_bs_rm_2(void *t, bus_space_handle_t h, bus_size_t o,
ata_bs_rm_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
u_int16_t *d, bus_size_t c)
{
struct ata_avila_softc *sc = t;
struct ata_avila_softc *sc = tag->bs_privdata;
enable_16(sc);
bus_space_read_multi_2(sc->sc_iot, h, o, d, c);
@ -404,10 +404,10 @@ ata_bs_rm_2(void *t, bus_space_handle_t h, bus_size_t o,
}
void
ata_bs_wm_2(void *t, bus_space_handle_t h, bus_size_t o,
ata_bs_wm_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
const u_int16_t *d, bus_size_t c)
{
struct ata_avila_softc *sc = t;
struct ata_avila_softc *sc = tag->bs_privdata;
enable_16(sc);
bus_space_write_multi_2(sc->sc_iot, h, o, d, c);
@ -417,10 +417,10 @@ ata_bs_wm_2(void *t, bus_space_handle_t h, bus_size_t o,
/* XXX workaround ata driver by (incorrectly) byte swapping stream cases */
void
ata_bs_rm_2_s(void *t, bus_space_handle_t h, bus_size_t o,
ata_bs_rm_2_s(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
u_int16_t *d, bus_size_t c)
{
struct ata_avila_softc *sc = t;
struct ata_avila_softc *sc = tag->bs_privdata;
uint16_t v;
bus_size_t i;
@ -437,10 +437,10 @@ ata_bs_rm_2_s(void *t, bus_space_handle_t h, bus_size_t o,
}
void
ata_bs_wm_2_s(void *t, bus_space_handle_t h, bus_size_t o,
ata_bs_wm_2_s(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
const u_int16_t *d, bus_size_t c)
{
struct ata_avila_softc *sc = t;
struct ata_avila_softc *sc = tag->bs_privdata;
bus_size_t i;
enable_16(sc);

34
sys/arm/xscale/ixp425/cambria_exp_space.c
View File

@ -83,9 +83,9 @@ disable_16(struct ixp425_softc *sc, bus_size_t cs)
}
static uint8_t
cambria_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o)
cambria_bs_r_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
{
struct expbus_softc *exp = t;
struct expbus_softc *exp = tag->bs_privdata;
struct ixp425_softc *sc = exp->sc;
uint8_t v;
@ -96,9 +96,9 @@ cambria_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o)
}
static void
cambria_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
cambria_bs_w_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, u_int8_t v)
{
struct expbus_softc *exp = t;
struct expbus_softc *exp = tag->bs_privdata;
struct ixp425_softc *sc = exp->sc;
EXP_LOCK(exp);
@ -107,9 +107,9 @@ cambria_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
}
static uint16_t
cambria_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o)
cambria_bs_r_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
{
struct expbus_softc *exp = t;
struct expbus_softc *exp = tag->bs_privdata;
struct ixp425_softc *sc = exp->sc;
uint16_t v;
@ -122,9 +122,9 @@ cambria_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o)
}
static void
cambria_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
cambria_bs_w_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, uint16_t v)
{
struct expbus_softc *exp = t;
struct expbus_softc *exp = tag->bs_privdata;
struct ixp425_softc *sc = exp->sc;
EXP_LOCK(exp);
@ -135,10 +135,10 @@ cambria_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
}
static void
cambria_bs_rm_2(void *t, bus_space_handle_t h, bus_size_t o,
cambria_bs_rm_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
u_int16_t *d, bus_size_t c)
{
struct expbus_softc *exp = t;
struct expbus_softc *exp = tag->bs_privdata;
struct ixp425_softc *sc = exp->sc;
EXP_LOCK(exp);
@ -149,10 +149,10 @@ cambria_bs_rm_2(void *t, bus_space_handle_t h, bus_size_t o,
}
static void
cambria_bs_wm_2(void *t, bus_space_handle_t h, bus_size_t o,
cambria_bs_wm_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
const u_int16_t *d, bus_size_t c)
{
struct expbus_softc *exp = t;
struct expbus_softc *exp = tag->bs_privdata;
struct ixp425_softc *sc = exp->sc;
EXP_LOCK(exp);
@ -165,10 +165,10 @@ cambria_bs_wm_2(void *t, bus_space_handle_t h, bus_size_t o,
/* XXX workaround ata driver by (incorrectly) byte swapping stream cases */
static void
cambria_bs_rm_2_s(void *t, bus_space_handle_t h, bus_size_t o,
cambria_bs_rm_2_s(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
u_int16_t *d, bus_size_t c)
{
struct expbus_softc *exp = t;
struct expbus_softc *exp = tag->bs_privdata;
struct ixp425_softc *sc = exp->sc;
uint16_t v;
bus_size_t i;
@ -188,10 +188,10 @@ cambria_bs_rm_2_s(void *t, bus_space_handle_t h, bus_size_t o,
}
static void
cambria_bs_wm_2_s(void *t, bus_space_handle_t h, bus_size_t o,
cambria_bs_wm_2_s(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o,
const u_int16_t *d, bus_size_t c)
{
struct expbus_softc *exp = t;
struct expbus_softc *exp = tag->bs_privdata;
struct ixp425_softc *sc = exp->sc;
bus_size_t i;
@ -244,7 +244,7 @@ cambria_exp_bus_init(struct ixp425_softc *sc)
c3.sc = sc;
c3.csoff = EXP_TIMING_CS3_OFFSET;
EXP_LOCK_INIT(&c3);
cambria_exp_bs_tag.bs_cookie = &c3;
cambria_exp_bs_tag.bs_privdata = &c3;
cs3 = EXP_BUS_READ_4(sc, EXP_TIMING_CS3_OFFSET);
/* XXX force slowest possible timings and byte mode */

3
sys/arm/xscale/ixp425/ixp425_a4x_space.c
View File

@ -62,11 +62,10 @@ __FBSDID("$FreeBSD$");
/* Prototypes for all the bus_space structure functions */
bs_protos(a4x);
bs_protos(generic);
bs_protos(generic_armv4);
struct bus_space ixp425_a4x_bs_tag = {
/* cookie */
.bs_cookie = (void *) 0,
.bs_privdata = (void *) 0,
/* mapping/unmapping */
.bs_map = generic_bs_map,

151
sys/arm/xscale/ixp425/ixp425_pci_space.c
View File

@ -72,30 +72,30 @@ bs_protos(ixp425_pci_io);
bs_protos(ixp425_pci_mem);
/* special I/O functions */
static u_int8_t _pci_io_bs_r_1(void *, bus_space_handle_t, bus_size_t);
static u_int16_t _pci_io_bs_r_2(void *, bus_space_handle_t, bus_size_t);
static u_int32_t _pci_io_bs_r_4(void *, bus_space_handle_t, bus_size_t);
static u_int8_t _pci_io_bs_r_1(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static u_int16_t _pci_io_bs_r_2(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static u_int32_t _pci_io_bs_r_4(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static void _pci_io_bs_w_1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
static void _pci_io_bs_w_2(void *, bus_space_handle_t, bus_size_t, u_int16_t);
static void _pci_io_bs_w_4(void *, bus_space_handle_t, bus_size_t, u_int32_t);
static void _pci_io_bs_w_1(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int8_t);
static void _pci_io_bs_w_2(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int16_t);
static void _pci_io_bs_w_4(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int32_t);
#ifdef __ARMEB__
static u_int8_t _pci_io_bs_r_1_s(void *, bus_space_handle_t, bus_size_t);
static u_int16_t _pci_io_bs_r_2_s(void *, bus_space_handle_t, bus_size_t);
static u_int32_t _pci_io_bs_r_4_s(void *, bus_space_handle_t, bus_size_t);
static u_int8_t _pci_io_bs_r_1_s(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static u_int16_t _pci_io_bs_r_2_s(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static u_int32_t _pci_io_bs_r_4_s(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static void _pci_io_bs_w_1_s(void *, bus_space_handle_t, bus_size_t, u_int8_t);
static void _pci_io_bs_w_2_s(void *, bus_space_handle_t, bus_size_t, u_int16_t);
static void _pci_io_bs_w_4_s(void *, bus_space_handle_t, bus_size_t, u_int32_t);
static void _pci_io_bs_w_1_s(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int8_t);
static void _pci_io_bs_w_2_s(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int16_t);
static void _pci_io_bs_w_4_s(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int32_t);
static u_int8_t _pci_mem_bs_r_1(void *, bus_space_handle_t, bus_size_t);
static u_int16_t _pci_mem_bs_r_2(void *, bus_space_handle_t, bus_size_t);
static u_int32_t _pci_mem_bs_r_4(void *, bus_space_handle_t, bus_size_t);
static u_int8_t _pci_mem_bs_r_1(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static u_int16_t _pci_mem_bs_r_2(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static u_int32_t _pci_mem_bs_r_4(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static void _pci_mem_bs_w_1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
static void _pci_mem_bs_w_2(void *, bus_space_handle_t, bus_size_t, u_int16_t);
static void _pci_mem_bs_w_4(void *, bus_space_handle_t, bus_size_t, u_int32_t);
static void _pci_mem_bs_w_1(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int8_t);
static void _pci_mem_bs_w_2(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int16_t);
static void _pci_mem_bs_w_4(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int32_t);
#endif
struct bus_space ixp425_pci_io_bs_tag_template = {
@ -146,7 +146,7 @@ void
ixp425_io_bs_init(bus_space_tag_t bs, void *cookie)
{
*bs = ixp425_pci_io_bs_tag_template;
bs->bs_cookie = cookie;
bs->bs_privdata = cookie;
}
struct bus_space ixp425_pci_mem_bs_tag_template = {
@ -202,12 +202,12 @@ void
ixp425_mem_bs_init(bus_space_tag_t bs, void *cookie)
{
*bs = ixp425_pci_mem_bs_tag_template;
bs->bs_cookie = cookie;
bs->bs_privdata = cookie;
}
/* common routine */
int
ixp425_pci_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
ixp425_pci_bs_subregion(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t size, bus_space_handle_t *nbshp)
{
*nbshp = bsh + offset;
@ -215,7 +215,7 @@ ixp425_pci_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
}
void
ixp425_pci_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
ixp425_pci_bs_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset,
bus_size_t len, int flags)
{
/* NULL */
@ -223,7 +223,7 @@ ixp425_pci_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
/* io bs */
int
ixp425_pci_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
ixp425_pci_io_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size,
int cacheable, bus_space_handle_t *bshp)
{
*bshp = bpa;
@ -231,13 +231,13 @@ ixp425_pci_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
}
void
ixp425_pci_io_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
ixp425_pci_io_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size)
{
/* Nothing to do. */
}
int
ixp425_pci_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
ixp425_pci_io_bs_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend,
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int cacheable,
bus_addr_t *bpap, bus_space_handle_t *bshp)
{
@ -245,14 +245,14 @@ ixp425_pci_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
}
void
ixp425_pci_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
ixp425_pci_io_bs_free(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size)
{
panic("ixp425_pci_io_bs_free(): not implemented\n");
}
/* special I/O functions */
static __inline u_int32_t
_bs_r(void *v, bus_space_handle_t ioh, bus_size_t off, u_int32_t be)
_bs_r(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off, u_int32_t be)
{
u_int32_t data;
@ -266,75 +266,75 @@ _bs_r(void *v, bus_space_handle_t ioh, bus_size_t off, u_int32_t be)
}
static u_int8_t
_pci_io_bs_r_1(void *v, bus_space_handle_t ioh, bus_size_t off)
_pci_io_bs_r_1(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off)
{
u_int32_t data, n, be;
n = (ioh + off) % 4;
be = (0xf & ~(1U << n)) << NP_CBE_SHIFT;
data = _bs_r(v, ioh, off, be);
data = _bs_r(tag, ioh, off, be);
return data >> (8 * n);
}
static u_int16_t
_pci_io_bs_r_2(void *v, bus_space_handle_t ioh, bus_size_t off)
_pci_io_bs_r_2(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off)
{
u_int32_t data, n, be;
n = (ioh + off) % 4;
be = (0xf & ~((1U << n) | (1U << (n + 1)))) << NP_CBE_SHIFT;
data = _bs_r(v, ioh, off, be);
data = _bs_r(tag, ioh, off, be);
return data >> (8 * n);
}
static u_int32_t
_pci_io_bs_r_4(void *v, bus_space_handle_t ioh, bus_size_t off)
_pci_io_bs_r_4(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off)
{
u_int32_t data;
data = _bs_r(v, ioh, off, 0);
data = _bs_r(tag, ioh, off, 0);
return data;
}
#ifdef __ARMEB__
static u_int8_t
_pci_io_bs_r_1_s(void *v, bus_space_handle_t ioh, bus_size_t off)
_pci_io_bs_r_1_s(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off)
{
u_int32_t data, n, be;
n = (ioh + off) % 4;
be = (0xf & ~(1U << n)) << NP_CBE_SHIFT;
data = _bs_r(v, ioh, off, be);
data = _bs_r(tag, ioh, off, be);
return data >> (8 * n);
}
static u_int16_t
_pci_io_bs_r_2_s(void *v, bus_space_handle_t ioh, bus_size_t off)
_pci_io_bs_r_2_s(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off)
{
u_int32_t data, n, be;
n = (ioh + off) % 4;
be = (0xf & ~((1U << n) | (1U << (n + 1)))) << NP_CBE_SHIFT;
data = _bs_r(v, ioh, off, be);
data = _bs_r(tag, ioh, off, be);
return data >> (8 * n);
}
static u_int32_t
_pci_io_bs_r_4_s(void *v, bus_space_handle_t ioh, bus_size_t off)
_pci_io_bs_r_4_s(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off)
{
u_int32_t data;
data = _bs_r(v, ioh, off, 0);
data = _bs_r(tag, ioh, off, 0);
return le32toh(data);
}
#endif /* __ARMEB__ */
static __inline void
_bs_w(void *v, bus_space_handle_t ioh, bus_size_t off,
_bs_w(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off,
u_int32_t be, u_int32_t data)
{
CSR_WRITE_4(PCI_NP_AD, (ioh + off) & ~3);
@ -345,7 +345,7 @@ _bs_w(void *v, bus_space_handle_t ioh, bus_size_t off,
}
static void
_pci_io_bs_w_1(void *v, bus_space_handle_t ioh, bus_size_t off,
_pci_io_bs_w_1(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off,
u_int8_t val)
{
u_int32_t data, n, be;
@ -353,11 +353,11 @@ _pci_io_bs_w_1(void *v, bus_space_handle_t ioh, bus_size_t off,
n = (ioh + off) % 4;
be = (0xf & ~(1U << n)) << NP_CBE_SHIFT;
data = val << (8 * n);
_bs_w(v, ioh, off, be, data);
_bs_w(tag, ioh, off, be, data);
}
static void
_pci_io_bs_w_2(void *v, bus_space_handle_t ioh, bus_size_t off,
_pci_io_bs_w_2(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off,
u_int16_t val)
{
u_int32_t data, n, be;
@ -365,19 +365,19 @@ _pci_io_bs_w_2(void *v, bus_space_handle_t ioh, bus_size_t off,
n = (ioh + off) % 4;
be = (0xf & ~((1U << n) | (1U << (n + 1)))) << NP_CBE_SHIFT;
data = val << (8 * n);
_bs_w(v, ioh, off, be, data);
_bs_w(tag, ioh, off, be, data);
}
static void
_pci_io_bs_w_4(void *v, bus_space_handle_t ioh, bus_size_t off,
_pci_io_bs_w_4(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off,
u_int32_t val)
{
_bs_w(v, ioh, off, 0, val);
_bs_w(tag, ioh, off, 0, val);
}
#ifdef __ARMEB__
static void
_pci_io_bs_w_1_s(void *v, bus_space_handle_t ioh, bus_size_t off,
_pci_io_bs_w_1_s(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off,
u_int8_t val)
{
u_int32_t data, n, be;
@ -385,11 +385,11 @@ _pci_io_bs_w_1_s(void *v, bus_space_handle_t ioh, bus_size_t off,
n = (ioh + off) % 4;
be = (0xf & ~(1U << n)) << NP_CBE_SHIFT;
data = val << (8 * n);
_bs_w(v, ioh, off, be, data);
_bs_w(tag, ioh, off, be, data);
}
static void
_pci_io_bs_w_2_s(void *v, bus_space_handle_t ioh, bus_size_t off,
_pci_io_bs_w_2_s(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off,
u_int16_t val)
{
u_int32_t data, n, be;
@ -397,46 +397,35 @@ _pci_io_bs_w_2_s(void *v, bus_space_handle_t ioh, bus_size_t off,
n = (ioh + off) % 4;
be = (0xf & ~((1U << n) | (1U << (n + 1)))) << NP_CBE_SHIFT;
data = val << (8 * n);
_bs_w(v, ioh, off, be, data);
_bs_w(tag, ioh, off, be, data);
}
static void
_pci_io_bs_w_4_s(void *v, bus_space_handle_t ioh, bus_size_t off,
_pci_io_bs_w_4_s(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off,
u_int32_t val)
{
_bs_w(v, ioh, off, 0, htole32(val));
_bs_w(tag, ioh, off, 0, htole32(val));
}
#endif /* __ARMEB__ */
/* mem bs */
int
ixp425_pci_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
ixp425_pci_mem_bs_map(bus_space_tag_t tag, bus_addr_t bpa, bus_size_t size,
int cacheable, bus_space_handle_t *bshp)
{
vm_paddr_t pa, endpa;
pa = trunc_page(bpa);
endpa = round_page(bpa + size);
*bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa);
*bshp = (vm_offset_t)pmap_mapdev(bpa, size);
return (0);
}
void
ixp425_pci_mem_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size)
ixp425_pci_mem_bs_unmap(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t size)
{
vm_offset_t va, endva;
va = trunc_page((vm_offset_t)t);
endva = va + round_page(size);
/* Free the kernel virtual mapping. */
kva_free(va, endva - va);
pmap_unmapdev((vm_offset_t)h, size);
}
int
ixp425_pci_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
ixp425_pci_mem_bs_alloc(bus_space_tag_t tag, bus_addr_t rstart, bus_addr_t rend,
bus_size_t size, bus_size_t alignment, bus_size_t boundary, int cacheable,
bus_addr_t *bpap, bus_space_handle_t *bshp)
{
@ -444,52 +433,52 @@ ixp425_pci_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
}
void
ixp425_pci_mem_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
ixp425_pci_mem_bs_free(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t size)
{
panic("ixp425_mem_bs_free(): not implemented\n");
}
#ifdef __ARMEB__
static u_int8_t
_pci_mem_bs_r_1(void *v, bus_space_handle_t ioh, bus_size_t off)
_pci_mem_bs_r_1(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off)
{
return ixp425_pci_mem_bs_r_1(v, ioh, off);
return ixp425_pci_mem_bs_r_1(tag, ioh, off);
}
static u_int16_t
_pci_mem_bs_r_2(void *v, bus_space_handle_t ioh, bus_size_t off)
_pci_mem_bs_r_2(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off)
{
return (ixp425_pci_mem_bs_r_2(v, ioh, off));
return (ixp425_pci_mem_bs_r_2(tag, ioh, off));
}
static u_int32_t
_pci_mem_bs_r_4(void *v, bus_space_handle_t ioh, bus_size_t off)
_pci_mem_bs_r_4(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off)
{
u_int32_t data;
data = ixp425_pci_mem_bs_r_4(v, ioh, off);
data = ixp425_pci_mem_bs_r_4(tag, ioh, off);
return (le32toh(data));
}
static void
_pci_mem_bs_w_1(void *v, bus_space_handle_t ioh, bus_size_t off,
_pci_mem_bs_w_1(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off,
u_int8_t val)
{
ixp425_pci_mem_bs_w_1(v, ioh, off, val);
ixp425_pci_mem_bs_w_1(tag, ioh, off, val);
}
static void
_pci_mem_bs_w_2(void *v, bus_space_handle_t ioh, bus_size_t off,
_pci_mem_bs_w_2(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off,
u_int16_t val)
{
ixp425_pci_mem_bs_w_2(v, ioh, off, val);
ixp425_pci_mem_bs_w_2(tag, ioh, off, val);
}
static void
_pci_mem_bs_w_4(void *v, bus_space_handle_t ioh, bus_size_t off,
_pci_mem_bs_w_4(bus_space_tag_t tag, bus_space_handle_t ioh, bus_size_t off,
u_int32_t val)
{
ixp425_pci_mem_bs_w_4(v, ioh, off, htole32(val));
ixp425_pci_mem_bs_w_4(tag, ioh, off, htole32(val));
}
#endif /* __ARMEB__ */

19
sys/arm/xscale/ixp425/ixp425_space.c
View File

@ -59,11 +59,10 @@ __FBSDID("$FreeBSD$");
/* Proto types for all the bus_space structure functions */
bs_protos(generic);
bs_protos(generic_armv4);
struct bus_space ixp425_bs_tag = {
/* cookie */
.bs_cookie = (void *) 0,
.bs_privdata = (void *) 0,
/* mapping/unmapping */
.bs_map = generic_bs_map,
@ -79,37 +78,37 @@ struct bus_space ixp425_bs_tag = {
/* read (single) */
.bs_r_1 = generic_bs_r_1,
.bs_r_2 = generic_armv4_bs_r_2,
.bs_r_2 = generic_bs_r_2,
.bs_r_4 = generic_bs_r_4,
.bs_r_8 = NULL,
/* read multiple */
.bs_rm_1 = generic_bs_rm_1,
.bs_rm_2 = generic_armv4_bs_rm_2,
.bs_rm_2 = generic_bs_rm_2,
.bs_rm_4 = generic_bs_rm_4,
.bs_rm_8 = NULL,
/* read region */
.bs_rr_1 = generic_bs_rr_1,
.bs_rr_2 = generic_armv4_bs_rr_2,
.bs_rr_2 = generic_bs_rr_2,
.bs_rr_4 = generic_bs_rr_4,
.bs_rr_8 = NULL,
/* write (single) */
.bs_w_1 = generic_bs_w_1,
.bs_w_2 = generic_armv4_bs_w_2,
.bs_w_2 = generic_bs_w_2,
.bs_w_4 = generic_bs_w_4,
.bs_w_8 = NULL,
/* write multiple */
.bs_wm_1 = generic_bs_wm_1,
.bs_wm_2 = generic_armv4_bs_wm_2,
.bs_wm_2 = generic_bs_wm_2,
.bs_wm_4 = generic_bs_wm_4,
.bs_wm_8 = NULL,
/* write region */
.bs_wr_1 = generic_bs_wr_1,
.bs_wr_2 = generic_armv4_bs_wr_2,
.bs_wr_2 = generic_bs_wr_2,
.bs_wr_4 = generic_bs_wr_4,
.bs_wr_8 = NULL,
@ -118,13 +117,13 @@ struct bus_space ixp425_bs_tag = {
/* set region */
.bs_sr_1 = NULL,
.bs_sr_2 = generic_armv4_bs_sr_2,
.bs_sr_2 = generic_bs_sr_2,
.bs_sr_4 = generic_bs_sr_4,
.bs_sr_8 = NULL,
/* copy */
.bs_c_1 = NULL,
.bs_c_2 = generic_armv4_bs_c_2,
.bs_c_2 = generic_bs_c_2,
.bs_c_4 = NULL,
.bs_c_8 = NULL,
};

151
sys/arm/xscale/pxa/pxa_space.c
View File

@ -57,7 +57,6 @@ static MALLOC_DEFINE(M_PXATAG, "PXA bus_space tags", "Bus_space tags for PXA");
/* Prototypes for all the bus_space structure functions */
bs_protos(generic);
bs_protos(generic_armv4);
bs_protos(pxa);
/*
@ -66,73 +65,109 @@ bs_protos(pxa);
*/
struct bus_space _base_tag = {
/* cookie */
(void *) 0,
.bs_privdata = NULL,
/* mapping/unmapping */
generic_bs_map,
generic_bs_unmap,
generic_bs_subregion,
.bs_map = generic_bs_map,
.bs_unmap = generic_bs_unmap,
.bs_subregion = generic_bs_subregion,
/* allocation/deallocation */
generic_bs_alloc,
generic_bs_free,
.bs_alloc = generic_bs_alloc,
.bs_free = generic_bs_free,
/* barrier */
generic_bs_barrier,
.bs_barrier = generic_bs_barrier,
/* read (single) */
pxa_bs_r_1,
pxa_bs_r_2,
pxa_bs_r_4,
NULL,
.bs_r_1 = pxa_bs_r_1,
.bs_r_2 = pxa_bs_r_2,
.bs_r_4 = pxa_bs_r_4,
.bs_r_8 = BS_UNIMPLEMENTED,
/* read multiple */
pxa_bs_rm_1,
pxa_bs_rm_2,
NULL,
NULL,
.bs_rm_1 = pxa_bs_rm_1,
.bs_rm_2 = pxa_bs_rm_2,
.bs_rm_4 = BS_UNIMPLEMENTED,
.bs_rm_8 = BS_UNIMPLEMENTED,
/* read region */
pxa_bs_rr_1,
NULL,
NULL,
NULL,
.bs_rr_1 = pxa_bs_rr_1,
.bs_rr_2 = BS_UNIMPLEMENTED,
.bs_rr_4 = BS_UNIMPLEMENTED,
.bs_rr_8 = BS_UNIMPLEMENTED,
/* write (single) */
pxa_bs_w_1,
pxa_bs_w_2,
pxa_bs_w_4,
NULL,
.bs_w_1 = pxa_bs_w_1,
.bs_w_2 = pxa_bs_w_2,
.bs_w_4 = pxa_bs_w_4,
.bs_w_8 = BS_UNIMPLEMENTED,
/* write multiple */
pxa_bs_wm_1,
pxa_bs_wm_2,
NULL,
NULL,
.bs_wm_1 = pxa_bs_wm_1,
.bs_wm_2 = pxa_bs_wm_2,
.bs_wm_4 = BS_UNIMPLEMENTED,
.bs_wm_8 = BS_UNIMPLEMENTED,
/* write region */
NULL,
NULL,
NULL,
NULL,
.bs_wr_1 = BS_UNIMPLEMENTED,
.bs_wr_2 = BS_UNIMPLEMENTED,
.bs_wr_4 = BS_UNIMPLEMENTED,
.bs_wr_8 = BS_UNIMPLEMENTED,
/* set multiple */
NULL,
NULL,
NULL,
NULL,
.bs_sm_1 = BS_UNIMPLEMENTED,
.bs_sm_2 = BS_UNIMPLEMENTED,
.bs_sm_4 = BS_UNIMPLEMENTED,
.bs_sm_8 = BS_UNIMPLEMENTED,
/* set region */
NULL,
NULL,
NULL,
NULL,
.bs_sr_1 = BS_UNIMPLEMENTED,
.bs_sr_2 = BS_UNIMPLEMENTED,
.bs_sr_4 = BS_UNIMPLEMENTED,
.bs_sr_8 = BS_UNIMPLEMENTED,
/* copy */
NULL,
NULL,
NULL,
NULL,
.bs_c_1 = BS_UNIMPLEMENTED,
.bs_c_2 = BS_UNIMPLEMENTED,
.bs_c_4 = BS_UNIMPLEMENTED,
.bs_c_8 = BS_UNIMPLEMENTED,
/* read stream (single) */
.bs_r_1_s = BS_UNIMPLEMENTED,
.bs_r_2_s = BS_UNIMPLEMENTED,
.bs_r_4_s = BS_UNIMPLEMENTED,
.bs_r_8_s = BS_UNIMPLEMENTED,
/* read multiple stream */
.bs_rm_1_s = BS_UNIMPLEMENTED,
.bs_rm_2_s = BS_UNIMPLEMENTED,
.bs_rm_4_s = BS_UNIMPLEMENTED,
.bs_rm_8_s = BS_UNIMPLEMENTED,
/* read region stream */
.bs_rr_1_s = BS_UNIMPLEMENTED,
.bs_rr_2_s = BS_UNIMPLEMENTED,
.bs_rr_4_s = BS_UNIMPLEMENTED,
.bs_rr_8_s = BS_UNIMPLEMENTED,
/* write stream (single) */
.bs_w_1_s = BS_UNIMPLEMENTED,
.bs_w_2_s = BS_UNIMPLEMENTED,
.bs_w_4_s = BS_UNIMPLEMENTED,
.bs_w_8_s = BS_UNIMPLEMENTED,
/* write multiple stream */
.bs_wm_1_s = BS_UNIMPLEMENTED,
.bs_wm_2_s = BS_UNIMPLEMENTED,
.bs_wm_4_s = BS_UNIMPLEMENTED,
.bs_wm_8_s = BS_UNIMPLEMENTED,
/* write region stream */
.bs_wr_1_s = BS_UNIMPLEMENTED,
.bs_wr_2_s = BS_UNIMPLEMENTED,
.bs_wr_4_s = BS_UNIMPLEMENTED,
.bs_wr_8_s = BS_UNIMPLEMENTED,
};
static struct bus_space _obio_tag;
@ -145,7 +180,7 @@ pxa_obio_tag_init()
{
bcopy(&_base_tag, &_obio_tag, sizeof(struct bus_space));
_obio_tag.bs_cookie = (void *)PXA2X0_PERIPH_OFFSET;
_obio_tag.bs_privdata = (void *)PXA2X0_PERIPH_OFFSET;
obio_tag = &_obio_tag;
}
@ -161,7 +196,7 @@ pxa_bus_tag_alloc(bus_addr_t offset)
}
bcopy(&_base_tag, tag, sizeof(struct bus_space));
tag->bs_cookie = (void *)offset;
tag->bs_privdata = (void *)offset;
return ((bus_space_tag_t)tag);
}
@ -169,49 +204,49 @@ pxa_bus_tag_alloc(bus_addr_t offset)
#define READ_SINGLE(type, proto, base) \
type \
proto(void *cookie, bus_space_handle_t bsh, bus_size_t offset) \
proto(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset) \
{ \
bus_addr_t tag_offset; \
type value; \
tag_offset = (bus_addr_t)cookie; \
tag_offset = (bus_addr_t)tag->bs_privdata; \
value = base(NULL, bsh + tag_offset, offset); \
return (value); \
}
READ_SINGLE(u_int8_t, pxa_bs_r_1, generic_bs_r_1)
READ_SINGLE(u_int16_t, pxa_bs_r_2, generic_armv4_bs_r_2)
READ_SINGLE(u_int16_t, pxa_bs_r_2, generic_bs_r_2)
READ_SINGLE(u_int32_t, pxa_bs_r_4, generic_bs_r_4)
#undef READ_SINGLE
#define WRITE_SINGLE(type, proto, base) \
void \
proto(void *cookie, bus_space_handle_t bsh, bus_size_t offset, \
proto(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, \
type value) \
{ \
bus_addr_t tag_offset; \
tag_offset = (bus_addr_t)cookie; \
tag_offset = (bus_addr_t)tag->bs_privdata; \
base(NULL, bsh + tag_offset, offset, value); \
}
WRITE_SINGLE(u_int8_t, pxa_bs_w_1, generic_bs_w_1)
WRITE_SINGLE(u_int16_t, pxa_bs_w_2, generic_armv4_bs_w_2)
WRITE_SINGLE(u_int16_t, pxa_bs_w_2, generic_bs_w_2)
WRITE_SINGLE(u_int32_t, pxa_bs_w_4, generic_bs_w_4)
#undef WRITE_SINGLE
#define READ_MULTI(type, proto, base) \
void \
proto(void *cookie, bus_space_handle_t bsh, bus_size_t offset, \
proto(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, \
type *dest, bus_size_t count) \
{ \
bus_addr_t tag_offset; \
tag_offset = (bus_addr_t)cookie; \
tag_offset = (bus_addr_t)tag->bs_privdata; \
base(NULL, bsh + tag_offset, offset, dest, count); \
}
READ_MULTI(u_int8_t, pxa_bs_rm_1, generic_bs_rm_1)
READ_MULTI(u_int16_t, pxa_bs_rm_2, generic_armv4_bs_rm_2)
READ_MULTI(u_int16_t, pxa_bs_rm_2, generic_bs_rm_2)
READ_MULTI(u_int8_t, pxa_bs_rr_1, generic_bs_rr_1)
@ -219,15 +254,15 @@ READ_MULTI(u_int8_t, pxa_bs_rr_1, generic_bs_rr_1)
#define WRITE_MULTI(type, proto, base) \
void \
proto(void *cookie, bus_space_handle_t bsh, bus_size_t offset, \
proto(bus_space_tag_t tag, bus_space_handle_t bsh, bus_size_t offset, \
const type *src, bus_size_t count) \
{ \
bus_addr_t tag_offset; \
tag_offset = (bus_addr_t)cookie; \
tag_offset = (bus_addr_t)tag->bs_privdata; \
base(NULL, bsh + tag_offset, offset, src, count); \
}
WRITE_MULTI(u_int8_t, pxa_bs_wm_1, generic_bs_wm_1)
WRITE_MULTI(u_int16_t, pxa_bs_wm_2, generic_armv4_bs_wm_2)
WRITE_MULTI(u_int16_t, pxa_bs_wm_2, generic_bs_wm_2)
#undef WRITE_MULTI

34
sys/dev/usb/controller/ehci_ixp4xx.c
View File

@ -79,12 +79,12 @@ struct ixp_ehci_softc {
static device_attach_t ehci_ixp_attach;
static device_detach_t ehci_ixp_detach;
static uint8_t ehci_bs_r_1(void *, bus_space_handle_t, bus_size_t);
static void ehci_bs_w_1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
static uint16_t ehci_bs_r_2(void *, bus_space_handle_t, bus_size_t);
static void ehci_bs_w_2(void *, bus_space_handle_t, bus_size_t, uint16_t);
static uint32_t ehci_bs_r_4(void *, bus_space_handle_t, bus_size_t);
static void ehci_bs_w_4(void *, bus_space_handle_t, bus_size_t, uint32_t);
static uint8_t ehci_bs_r_1(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static void ehci_bs_w_1(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int8_t);
static uint16_t ehci_bs_r_2(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static void ehci_bs_w_2(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, uint16_t);
static uint32_t ehci_bs_r_4(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
static void ehci_bs_w_4(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, uint32_t);
static int
ehci_ixp_probe(device_t self)
@ -132,7 +132,7 @@ ehci_ixp_attach(device_t self)
* done with bus_space_subregion.
*/
isc->iot = rman_get_bustag(sc->sc_io_res);
isc->tag.bs_cookie = isc->iot;
isc->tag.bs_privdata = isc->iot;
/* read single */
isc->tag.bs_r_1 = ehci_bs_r_1,
isc->tag.bs_r_2 = ehci_bs_r_2,
@ -252,41 +252,41 @@ ehci_ixp_detach(device_t self)
*/
static uint8_t
ehci_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o)
ehci_bs_r_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
{
return bus_space_read_1((bus_space_tag_t) t, h,
return bus_space_read_1((bus_space_tag_t)tag->bs_privdata, h,
0x100 + (o &~ 3) + (3 - (o & 3)));
}
static void
ehci_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
ehci_bs_w_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, u_int8_t v)
{
panic("%s", __func__);
}
static uint16_t
ehci_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o)
ehci_bs_r_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
{
return bus_space_read_2((bus_space_tag_t) t, h,
return bus_space_read_2((bus_space_tag_t)tag->bs_privdata, h,
0x100 + (o &~ 3) + (2 - (o & 3)));
}
static void
ehci_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
ehci_bs_w_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, uint16_t v)
{
panic("%s", __func__);
}
static uint32_t
ehci_bs_r_4(void *t, bus_space_handle_t h, bus_size_t o)
ehci_bs_r_4(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
{
return bus_space_read_4((bus_space_tag_t) t, h, 0x100 + o);
return bus_space_read_4((bus_space_tag_t) tag->bs_privdata, h, 0x100 + o);
}
static void
ehci_bs_w_4(void *t, bus_space_handle_t h, bus_size_t o, uint32_t v)
ehci_bs_w_4(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, uint32_t v)
{
bus_space_write_4((bus_space_tag_t) t, h, 0x100 + o, v);
bus_space_write_4((bus_space_tag_t) tag->bs_privdata, h, 0x100 + o, v);
}
static device_method_t ehci_methods[] = {