Add some generic interrupt dispatch code.
This commit is contained in:
Doug Rabson
parent
cefd88ce75
commit
56abfaf4eb
@ -1,4 +1,4 @@
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/* $Id: interrupt.c,v 1.2 1998/06/10 20:13:32 dfr Exp $ */
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/* $Id: interrupt.c,v 1.3 1998/07/05 12:22:56 dfr Exp $ */
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/* $NetBSD: interrupt.c,v 1.23 1998/02/24 07:38:01 thorpej Exp $ */
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/*
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@ -41,11 +41,14 @@
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/vmmeter.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <machine/reg.h>
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#include <machine/frame.h>
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#include <machine/cpuconf.h>
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#include <machine/bwx.h>
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#include <machine/intr.h>
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#if 0
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#ifdef EVCNT_COUNTERS
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@ -271,3 +274,44 @@ badaddr_read(addr, size, rptr)
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/* Return non-zero (i.e. true) if it's a bad address. */
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return (mc_received);
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}
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#define HASHVEC(vector) ((vector) % 31)
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static struct alpha_intr_list alpha_intr_hash[31];
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struct alpha_intr *
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alpha_create_intr(int vector, driver_intr_t *intr, void *arg)
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{
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struct alpha_intr *i;
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i = malloc(sizeof(struct alpha_intr), M_DEVBUF, M_NOWAIT);
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if (!i)
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return NULL;
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i->vector = vector;
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i->intr = intr;
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i->arg = arg;
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return i;
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}
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int
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alpha_connect_intr(struct alpha_intr *i)
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{
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int h = HASHVEC(i->vector);
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int s;
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s = splhigh();
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LIST_INSERT_HEAD(&alpha_intr_hash[h], i, list);
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splx(s);
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return 0;
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}
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void
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alpha_dispatch_intr(int vector)
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{
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struct alpha_intr *i;
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int h = HASHVEC(vector);
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for (i = LIST_FIRST(&alpha_intr_hash[h]); i; i = LIST_NEXT(i, list))
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if (i->vector == vector)
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i->intr(i->arg);
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}
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@ -1,124 +1,46 @@
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/* $Id$ */
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/* From: NetBSD: intr.h,v 1.11 1997/11/10 18:23:50 mjacob Exp */
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/*
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* Copyright (c) 1997 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1996 Carnegie-Mellon University.
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/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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* $Id$
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*/
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#ifndef _ALPHA_INTR_H_
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#define _ALPHA_INTR_H_
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#ifndef _MACHINE_INTR_H_
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#define _MACHINE_INTR_H_
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#include <sys/queue.h>
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LIST_HEAD(alpha_intr_list, alpha_intr);
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#define IPL_NONE 0 /* disable only this interrupt */
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#define IPL_BIO 1 /* disable block I/O interrupts */
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#define IPL_NET 2 /* disable network interrupts */
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#define IPL_TTY 3 /* disable terminal interrupts */
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#define IPL_CLOCK 4 /* disable clock interrupts */
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#define IPL_HIGH 5 /* disable all interrupts */
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#define IST_UNUSABLE -1 /* interrupt cannot be used */
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#define IST_NONE 0 /* none (dummy) */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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#ifdef _KERNEL
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/* IPL-lowering/restoring macros */
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#define splx(s) \
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((s) == ALPHA_PSL_IPL_0 ? spl0() : alpha_pal_swpipl(s))
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#define splsoft() alpha_pal_swpipl(ALPHA_PSL_IPL_SOFT)
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#define splsoftclock() splsoft()
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#define splsoftnet() splsoft()
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/* IPL-raising functions/macros */
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static __inline int _splraise __P((int)) __attribute__ ((unused));
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static __inline int
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_splraise(s)
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int s;
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{
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int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK;
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return (s > cur ? alpha_pal_swpipl(s) : cur);
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}
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#define splnet() _splraise(ALPHA_PSL_IPL_IO)
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#define splbio() _splraise(ALPHA_PSL_IPL_IO)
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#define splimp() _splraise(ALPHA_PSL_IPL_IO)
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#define spltty() _splraise(ALPHA_PSL_IPL_IO)
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#define splclock() _splraise(ALPHA_PSL_IPL_CLOCK)
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#define splstatclock() _splraise(ALPHA_PSL_IPL_CLOCK)
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#define splhigh() _splraise(ALPHA_PSL_IPL_HIGH)
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/*
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* simulated software interrupt register
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*/
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extern u_int64_t ssir;
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#define SIR_NET 0x1
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#define SIR_CLOCK 0x2
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#define setsoftnet() ssir |= SIR_NET
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#define setsoftclock() ssir |= SIR_CLOCK
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/*
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* Alpha shared-interrupt-line common code.
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*/
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struct alpha_shared_intrhand {
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TAILQ_ENTRY(alpha_shared_intrhand)
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ih_q;
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int (*ih_fn) __P((void *));
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void *ih_arg;
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int ih_level;
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struct alpha_intr {
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LIST_ENTRY(alpha_intr) list; /* chain handlers in this hash bucket */
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int vector; /* vector to match */
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driver_intr_t *intr; /* handler function */
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void *arg; /* argument to handler */
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};
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struct alpha_shared_intr {
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TAILQ_HEAD(,alpha_shared_intrhand)
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intr_q;
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int intr_sharetype;
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int intr_dfltsharetype;
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int intr_nstrays;
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int intr_maxstrays;
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};
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struct alpha_intr *alpha_create_intr(int vector,
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driver_intr_t *intr, void *arg);
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int alpha_connect_intr(struct alpha_intr *i);
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void alpha_dispatch_intr(int vector);
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struct alpha_shared_intr *alpha_shared_intr_alloc __P((unsigned int));
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int alpha_shared_intr_dispatch __P((struct alpha_shared_intr *,
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unsigned int));
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void *alpha_shared_intr_establish __P((struct alpha_shared_intr *,
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unsigned int, int, int, int (*)(void *), void *, const char *));
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int alpha_shared_intr_get_sharetype __P((struct alpha_shared_intr *,
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unsigned int));
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int alpha_shared_intr_isactive __P((struct alpha_shared_intr *,
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unsigned int));
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void alpha_shared_intr_set_dfltsharetype __P((struct alpha_shared_intr *,
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unsigned int, int));
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void alpha_shared_intr_set_maxstrays __P((struct alpha_shared_intr *,
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unsigned int, int));
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void alpha_shared_intr_stray __P((struct alpha_shared_intr *, unsigned int,
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const char *));
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#endif
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#endif
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#endif /* !_MACHINE_INTR_H_ */
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