Next step on the road to pci: power taming.
Work through the various power commands and convert them from a "is this a foo controller or a foo' controller or a foo''' controller" to a cabability based scheme. We have bits in the softc that tell us what kind of power control scheme the controller uses, rather than relying on being able to enumerate them all. Cardbus bridges are numerous, but nearly all implement the i82365sl-DF scheme (well, a few implement cirrus CL-PD67xx, but those were made by Cirrus Logic!). Add a pointer back to the softc in each pcic_slot so we can access these flags. Add comments that talk about the issues here. Also note in passing that there are two differ Vpp schemes in use and that we may need to adjust the code to deal with both of them. Note why it usually works now. We have 5 power management modes right now: KING, AB, DF, PD and VG. AB is for the i82365 stpes A, B and C. DF is for step DF. PD is the cirrus logic extensions for 3.3V while VG is the VADEM extensions for 3.3V. KING is for the IBM KING controller found on some old cards. # I'm looking for one of those old cards or a laptop that has the KING # bridge in it. We have to still cheat and treat the AB parts like the DF parts because pci isn't here yet. As far as I can tell, this is harmless for actual old parts and necessary to work with 3.3V cards in some laptops. This almost eliminates all tests for controller in the code. There are still a few unrelated to power that need taming as well.
This commit is contained in:
Warner Losh
parent
e67316366d
commit
57462c010c
@ -122,6 +122,7 @@
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#define PCIC_PCPWRE 0x10 /* PC Card Power Enable */
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#define PCIC_VCC 0x18 /* Vcc control bits */
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#define PCIC_VCC_5V 0x10 /* 5 volts */
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#define PCIC_VCC_ON 0x10 /* Turn on VCC on some chips. */
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#define PCIC_VCC_3V 0x18 /* 3 volts */
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#define PCIC_VCC_5V_KING 0x14 /* 5 volts for KING PCIC */
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#define PCIC_VPP 0x03 /* Vpp control bits */
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@ -292,6 +292,7 @@ pcic_attach(device_t dev)
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sc->slotmask |= (1 << i);
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slt->cdata = sp;
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sp->slt = slt;
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sp->sc = sc;
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}
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if (sc->flags & PCIC_IO_MAPPED) {
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@ -365,7 +366,7 @@ pcic_attach(device_t dev)
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do_mgt_irq(sp, irq);
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/* Check for changes */
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pcic_setb(sp, PCIC_POWER, PCIC_PCPWRE| PCIC_DISRST);
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pcic_setb(sp, PCIC_POWER, PCIC_PCPWRE | PCIC_DISRST);
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stat = sp->getb(sp, PCIC_STATUS);
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if (bootverbose)
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printf("stat is %x\n", stat);
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@ -415,85 +416,97 @@ static int
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pcic_power(struct slot *slt)
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{
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unsigned char c;
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unsigned char reg = PCIC_DISRST|PCIC_PCPWRE;
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unsigned char reg = PCIC_DISRST | PCIC_PCPWRE;
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struct pcic_slot *sp = slt->cdata;
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struct pcic_softc *sc = sp->sc;
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switch(sp->controller) {
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case PCIC_I82365SL_DF:
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if (sc->flags & (PCIC_DF_POWER | PCIC_AB_POWER)) {
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/*
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* Look at the VS[12]# bits on the card. If VS1 is clear
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* then we should apply 3.3 volts. Maybe we should do this
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* with other cards too. Cirrus logic cards (PD67[12]*) do
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* things like this in a different way.
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* then we should apply 3.3 volts.
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*/
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c = sp->getb(sp, PCIC_CDGC);
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if ((c & PCIC_VS1STAT) == 0)
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slt->pwr.vcc = 33;
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/* FALL THROUGH */
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case PCIC_I82365:
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case PCIC_PD672X:
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case PCIC_PD6710:
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case PCIC_VG365:
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case PCIC_VG465:
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case PCIC_VG468:
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case PCIC_VG469:
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case PCIC_RF5C396:
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case PCIC_IBM_KING:
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switch(slt->pwr.vpp) {
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default:
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return (EINVAL);
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case 0:
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break;
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case 50:
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case 33:
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reg |= PCIC_VPP_5V;
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break;
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case 120:
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reg |= PCIC_VPP_12V;
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}
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/*
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* XXX Note: The Vpp controls varies quit a bit between bridge chips
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* and the following might not be right in all cases. The Linux
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* code and wildboar code bases are more complex. However, most
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* applications want vpp == vcc and the following code does appear
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* to do that for all bridge sets.
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*/
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switch(slt->pwr.vpp) {
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default:
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return (EINVAL);
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case 0:
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break;
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case 50:
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case 33:
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reg |= PCIC_VPP_5V;
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break;
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case 120:
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reg |= PCIC_VPP_12V;
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break;
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}
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switch(slt->pwr.vcc) {
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default:
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return (EINVAL);
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case 0:
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break;
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case 33:
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reg |= PCIC_VCC_ON;
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/*
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* The wildboar code has comments that state that
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* the IBM KING controller doesn't support 3.3V
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* on the "IBM Smart PC card drive". The code
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* intemates that's the only place they have seen
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* it used and that there's a boatload of issues
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* with it. I'm not even sure this is right because
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* the only docs I've been able to find say this is for
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* 5V power. Of course, this "doc" is just code comments
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* so who knows for sure.
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*/
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if (sc->flags & PCIC_KING_POWER) {
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reg |= PCIC_VCC_5V_KING;
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break;
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}
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switch(slt->pwr.vcc) {
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default:
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return (EINVAL);
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case 0:
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if (sc->flags & PCIC_VG_POWER) {
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pcic_setb(sp, PCIC_CVSR, PCIC_CVSR_VS);
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break;
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case 33:
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/*
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* The wildboar code has comments that state that
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* the IBM KING controller doesn't support 3.3V
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* on the "IBM Smart PC card drive". The code
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* intemates that's the only place they have seen
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* it used and that there's a boatload of issues
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* with it.
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*/
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if (sp->controller == PCIC_IBM_KING) {
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reg |= PCIC_VCC_5V_KING;
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break;
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}
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}
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if (sc->flags & PCIC_PD_POWER) {
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pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
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break;
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}
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/*
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* Technically, The A, B, C stepping didn't support the 3.3V
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* cards. However, many cardbus bridges are identified
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* as AB cards by our probe routine, so we do both. It
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* won't hurt the A, B, C bridges that don't support this
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* bit since it is one of the reserved bits.
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*/
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if (sc->flags & (PCIC_AB_POWER | PCIC_DF_POWER))
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reg |= PCIC_VCC_3V;
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if ((sp->controller == PCIC_VG468) ||
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(sp->controller == PCIC_VG469) ||
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(sp->controller == PCIC_VG465) ||
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(sp->controller == PCIC_VG365))
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pcic_setb(sp, PCIC_CVSR, PCIC_CVSR_VS);
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else
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pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
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break;
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case 50:
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if (sp->controller == PCIC_IBM_KING) {
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reg |= PCIC_VCC_5V_KING;
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break;
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}
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reg |= PCIC_VCC_5V;
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if ((sp->controller == PCIC_VG468) ||
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(sp->controller == PCIC_VG469) ||
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(sp->controller == PCIC_VG465) ||
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(sp->controller == PCIC_VG365))
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pcic_clrb(sp, PCIC_CVSR, PCIC_CVSR_VS);
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else
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pcic_clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
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break;
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}
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break;
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case 50:
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if (sc->flags & PCIC_KING_POWER)
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reg |= PCIC_VCC_5V_KING;
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/*
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* For either of the two variant power schemes for 3.3V
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* go ahead and turn off the 3.3V magic. Then set the
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* 5V bits in all cases. This works because bit 4 is
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* set in PCIC_VCC_5V and in the altenrate PCIC_VCC_ON
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* is what non-82365 datasheets would lead one to believe
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* the bits are for.
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*/
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if (sc->flags & PCIC_VG_POWER)
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pcic_clrb(sp, PCIC_CVSR, PCIC_CVSR_VS);
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else if (sc->flags & PCIC_PD_POWER)
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pcic_clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
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reg |= PCIC_VCC_5V;
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break;
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}
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sp->putb(sp, PCIC_POWER, reg);
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@ -503,6 +516,7 @@ pcic_power(struct slot *slt)
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sp->putb(sp, PCIC_POWER, reg);
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DELAY(100*1000);
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}
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/*
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* Some chips are smarter than us it seems, so if we weren't
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* allowed to use 5V, try 3.3 instead
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@ -53,20 +53,22 @@ static struct isa_pnp_id pcic_ids[] = {
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{0}
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};
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static char *bridges[] =
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{
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"Intel i82365SL-A/B",
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"IBM PCIC",
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"VLSI 82C146",
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"Cirrus logic 672x",
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"Cirrus logic 6710",
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"Vadem 365",
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"Vadem 465",
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"Vadem 468",
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"Vadem 469",
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"Ricoh RF5C396",
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"IBM KING PCMCIA Controller",
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"Intel i82365SL-DF"
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static struct {
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const char *name;
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u_int32_t flags;
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} bridges[] = {
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{ "Intel i82365SL-A/B", PCIC_AB_POWER},
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{ "IBM PCIC", PCIC_AB_POWER},
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{ "VLSI 82C146", PCIC_AB_POWER},
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{ "Cirrus logic 672x", PCIC_PD_POWER},
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{ "Cirrus logic 6710", PCIC_PD_POWER},
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{ "Vadem 365", PCIC_VG_POWER},
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{ "Vadem 465", PCIC_VG_POWER},
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{ "Vadem 468", PCIC_VG_POWER},
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{ "Vadem 469", PCIC_VG_POWER},
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{ "Ricoh RF5C396", PCIC_AB_POWER},
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{ "IBM KING", PCIC_KING_POWER},
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{ "Intel i82365SL-DF", PCIC_DF_POWER}
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};
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/*
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@ -256,7 +258,8 @@ pcic_isa_probe(device_t dev)
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sp->revision = 8 - ((c & 0x1F) >> 2);
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}
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}
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device_set_desc(dev, bridges[(int) sp->controller]);
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device_set_desc(dev, bridges[(int) sp->controller].name);
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sc->flags = bridges[(int) sp->controller].flags;
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/*
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* OK it seems we have a PCIC or lookalike.
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* Allocate a slot and initialise the data structures.
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@ -34,6 +34,7 @@ struct pcic_slot {
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char controller; /* Device type */
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char revision; /* Device Revision */
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struct slot *slt; /* Back ptr to slot */
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struct pcic_softc *sc; /* Back pointer to softc */
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u_char (*getb)(struct pcic_slot *, int);
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void (*putb)(struct pcic_slot *, int, u_char);
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u_char *regs; /* Pointer to regs in mem */
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@ -43,8 +44,13 @@ struct pcic_softc
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{
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u_int32_t slotmask; /* Mask of valid slots */
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u_int32_t flags; /* Interesting flags */
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#define PCIC_IO_MAPPED 0x00000001
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#define PCIC_MEM_MAPPED 0x00000002
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#define PCIC_IO_MAPPED 0x00000001 /* ExCA registers are io mapped */
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#define PCIC_MEM_MAPPED 0x00000002 /* ExCA registers mem mapped */
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#define PCIC_VG_POWER 0x00000004 /* Uses VG power regs */
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#define PCIC_DF_POWER 0x00000008 /* Uses DF step regs */
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#define PCIC_PD_POWER 0x00000010 /* Uses CL-PD regs */
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#define PCIC_KING_POWER 0x00000020 /* Uses IBM KING regs */
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#define PCIC_AB_POWER 0x00000040 /* Use old A/B step power */
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int iorid; /* Rid of I/O region */
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struct resource *iores; /* resource for I/O region */
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int memrid;
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