From 57fa69eee6769e5e70233dc623478b48de7b07c9 Mon Sep 17 00:00:00 2001 From: andrew Date: Mon, 2 Oct 2017 14:22:35 +0000 Subject: [PATCH] Add a memory barrier to ensure the atomic write is visible to the other CPUs before waking them up. Sponsored by: DARPA, AFRL --- sys/arm64/arm64/mp_machdep.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/sys/arm64/arm64/mp_machdep.c b/sys/arm64/arm64/mp_machdep.c index 99c0a745eaaf..2b2d7f8fbe2c 100644 --- a/sys/arm64/arm64/mp_machdep.c +++ b/sys/arm64/arm64/mp_machdep.c @@ -236,7 +236,10 @@ release_aps(void *dummy __unused) atomic_store_rel_int(&aps_ready, 1); /* Wake up the other CPUs */ - __asm __volatile("sev"); + __asm __volatile( + "dsb ishst \n" + "sev \n" + ::: "memory"); printf("Release APs\n");