diff --git a/sys/mips/atheros/ar71xx_ehci.c b/sys/mips/atheros/ar71xx_ehci.c
index 272a52f609f9..cb716678758b 100644
--- a/sys/mips/atheros/ar71xx_ehci.c
+++ b/sys/mips/atheros/ar71xx_ehci.c
@@ -111,7 +111,6 @@ ar71xx_ehci_probe(device_t self)
 {
 
 	device_set_desc(self, EHCI_HC_DEVSTR);
-	printf("EHCI probed\n");
 
 	return (BUS_PROBE_DEFAULT);
 }
@@ -124,7 +123,6 @@ ar71xx_ehci_attach(device_t self)
 	int err;
 	int rid;
 
-	printf("EHCI attach\n");
 	/* initialise some bus fields */
 	sc->sc_bus.parent = self;
 	sc->sc_bus.devices = sc->sc_devices;
@@ -151,7 +149,7 @@ ar71xx_ehci_attach(device_t self)
 	 * Craft special resource for bus space ops that handle
 	 * byte-alignment of non-word addresses.  
 	 */
-	sc->sc_io_tag = &ar71xx_bus_space_reversed;
+	sc->sc_io_tag = ar71xx_bus_space_reversed;
 	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
 	sc->sc_io_size = rman_get_size(sc->sc_io_res);
 
diff --git a/sys/mips/atheros/uart_cpu_ar71xx.c b/sys/mips/atheros/uart_cpu_ar71xx.c
index 81a490ebbb15..c18bc7141b58 100644
--- a/sys/mips/atheros/uart_cpu_ar71xx.c
+++ b/sys/mips/atheros/uart_cpu_ar71xx.c
@@ -55,7 +55,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 {
 	di->ops = uart_getops(&uart_ns8250_class);
 	di->bas.chan = 0;
-	di->bas.bst = &ar71xx_bus_space_reversed;
+	di->bas.bst = ar71xx_bus_space_reversed;
 	di->bas.regshft = 2;
 	/* TODO: calculate proper AHB freq using PLL registers */
 	di->bas.rclk = 85000000;
@@ -66,7 +66,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 
 	/* TODO: check if uart_bus_space_io mandatory to set */
 	uart_bus_space_io = NULL;
-	uart_bus_space_mem = &ar71xx_bus_space_reversed;
+	uart_bus_space_mem = ar71xx_bus_space_reversed;
 	/* 
 	 * FIXME:
 	 * 3 is to compensate big endian, uart operates