loadandclear() uses an atomic instruction (even on SMP, where it's an
implicitly LOCK'ed instruction), so there shouldn't be any harm in making it volatile pointer compatable for one of the users of it. It seems to generate the same code regardless.
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@ -30,7 +30,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: cpufunc.h,v 1.85 1999/01/09 13:00:27 bde Exp $
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* $Id: cpufunc.h,v 1.86 1999/04/28 01:03:58 luoqi Exp $
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*/
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/*
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@ -289,7 +289,7 @@ inw(u_int port)
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}
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static __inline u_int
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loadandclear(u_int *addr)
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loadandclear(volatile u_int *addr)
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{
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u_int result;
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@ -30,7 +30,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: cpufunc.h,v 1.85 1999/01/09 13:00:27 bde Exp $
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* $Id: cpufunc.h,v 1.86 1999/04/28 01:03:58 luoqi Exp $
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*/
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/*
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@ -289,7 +289,7 @@ inw(u_int port)
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}
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static __inline u_int
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loadandclear(u_int *addr)
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loadandclear(volatile u_int *addr)
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{
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u_int result;
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@ -23,7 +23,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: ipl_funcs.c,v 1.17 1999/04/28 01:04:15 luoqi Exp $
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* $Id: ipl_funcs.c,v 1.18 1999/05/06 22:13:53 peter Exp $
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*/
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#include <sys/types.h>
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@ -44,7 +44,7 @@ void name(void) \
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setbits(var, bits); \
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}
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DO_SETBITS(setdelayed, &ipending, loadandclear((unsigned *)&idelayed))
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DO_SETBITS(setdelayed, &ipending, loadandclear(&idelayed))
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DO_SETBITS(setsoftast, &ipending, SWI_AST_PENDING)
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DO_SETBITS(setsoftcamnet,&ipending, SWI_CAMNET_PENDING)
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DO_SETBITS(setsoftcambio,&ipending, SWI_CAMBIO_PENDING)
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@ -143,7 +143,7 @@ void name(void) \
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IFCPL_UNLOCK(); \
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}
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DO_SETBITS(setdelayed, &ipending, loadandclear((unsigned *)&idelayed))
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DO_SETBITS(setdelayed, &ipending, loadandclear(&idelayed))
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DO_SETBITS(setsoftast, &ipending, SWI_AST_PENDING)
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DO_SETBITS(setsoftcamnet,&ipending, SWI_CAMNET_PENDING)
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DO_SETBITS(setsoftcambio,&ipending, SWI_CAMBIO_PENDING)
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