Strip out the machine-independant parts of the memory device.
/dev/(u)random, /dev/null, /dev/zero are all moving to machine-independant drivers. Reviewed by: dfr
This commit is contained in:
Mark Murray
parent
cc818cb690
commit
5afffbaa08
@ -112,7 +112,6 @@
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#include <i386/isa/intr_machdep.h>
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#include <isa/rtc.h>
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#include <machine/vm86.h>
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#include <sys/random.h>
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#include <sys/ptrace.h>
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#include <machine/sigframe.h>
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@ -1908,7 +1907,6 @@ init386(first)
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#if NISA >0
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isa_defaultirq();
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#endif
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rand_initialize();
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#ifdef DDB
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kdb_init();
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@ -53,27 +53,26 @@
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#include <sys/malloc.h>
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#include <sys/memrange.h>
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#include <sys/proc.h>
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#include <sys/random.h>
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#include <sys/signalvar.h>
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#include <sys/systm.h>
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#include <sys/uio.h>
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#include <machine/db_machdep.h>
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#include <machine/frame.h>
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#include <machine/psl.h>
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#include <machine/specialreg.h>
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#include <i386/isa/intr_machdep.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_extern.h>
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static dev_t memdev, kmemdev, iodev;
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static d_open_t mmopen;
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static d_close_t mmclose;
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static d_read_t mmrw;
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static d_ioctl_t mmioctl;
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static d_mmap_t memmmap;
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static d_poll_t mmpoll;
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#define CDEV_MAJOR 2
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static struct cdevsw mem_cdevsw = {
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@ -82,7 +81,7 @@ static struct cdevsw mem_cdevsw = {
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/* read */ mmrw,
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/* write */ mmrw,
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/* ioctl */ mmioctl,
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/* poll */ mmpoll,
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/* poll */ (d_poll_t *)seltrue,
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/* mmap */ memmmap,
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/* strategy */ nostrategy,
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/* name */ "mem",
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@ -93,39 +92,22 @@ static struct cdevsw mem_cdevsw = {
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/* bmaj */ -1
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};
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static struct random_softc random_softc[16];
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static caddr_t zbuf;
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MALLOC_DEFINE(M_MEMDESC, "memdesc", "memory range descriptors");
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static int mem_ioctl __P((dev_t, u_long, caddr_t, int, struct proc *));
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static int random_ioctl __P((dev_t, u_long, caddr_t, int, struct proc *));
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struct mem_range_softc mem_range_softc;
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static int
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mmclose(dev, flags, fmt, p)
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dev_t dev;
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int flags;
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int fmt;
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struct proc *p;
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mmclose(dev_t dev, int flags, int fmt, struct proc *p)
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{
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switch (minor(dev)) {
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case 14:
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p->p_md.md_regs->tf_eflags &= ~PSL_IOPL;
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break;
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default:
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break;
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}
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return (0);
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}
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static int
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mmopen(dev, flags, fmt, p)
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dev_t dev;
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int flags;
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int fmt;
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struct proc *p;
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mmopen(dev_t dev, int flags, int fmt, struct proc *p)
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{
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int error;
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@ -143,24 +125,19 @@ mmopen(dev, flags, fmt, p)
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return (EPERM);
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p->p_md.md_regs->tf_eflags |= PSL_IOPL;
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break;
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default:
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break;
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}
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return (0);
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}
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/*ARGSUSED*/
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static int
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mmrw(dev, uio, flags)
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dev_t dev;
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struct uio *uio;
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int flags;
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mmrw(dev_t dev, struct uio *uio, int flags)
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{
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register int o;
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register u_int c, v;
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u_int poolsize;
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register struct iovec *iov;
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int o;
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u_int c, v;
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struct iovec *iov;
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int error = 0;
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caddr_t buf = NULL;
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vm_offset_t addr, eaddr;
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while (uio->uio_resid > 0 && error == 0) {
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iov = uio->uio_iov;
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@ -187,8 +164,7 @@ mmrw(dev, uio, flags)
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continue;
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/* minor device 1 is kernel memory */
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case 1: {
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vm_offset_t addr, eaddr;
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case 1:
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c = iov->iov_len;
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/*
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@ -214,76 +190,6 @@ mmrw(dev, uio, flags)
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continue;
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}
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/* minor device 2 is EOF/RATHOLE */
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case 2:
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if (uio->uio_rw == UIO_READ)
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return (0);
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c = iov->iov_len;
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break;
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/* minor device 3 (/dev/random) is source of filth on read, rathole on write */
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case 3:
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if (uio->uio_rw == UIO_WRITE) {
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c = iov->iov_len;
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break;
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}
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if (buf == NULL)
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buf = (caddr_t)
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malloc(PAGE_SIZE, M_TEMP, M_WAITOK);
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c = min(iov->iov_len, PAGE_SIZE);
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poolsize = read_random(buf, c);
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if (poolsize == 0) {
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if (buf)
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free(buf, M_TEMP);
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return (0);
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}
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c = min(c, poolsize);
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error = uiomove(buf, (int)c, uio);
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continue;
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/* minor device 4 (/dev/urandom) is source of muck on read, rathole on write */
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case 4:
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if (uio->uio_rw == UIO_WRITE) {
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c = iov->iov_len;
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break;
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}
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if (CURSIG(curproc) != 0) {
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/*
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* Use tsleep() to get the error code right.
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* It should return immediately.
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*/
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error = tsleep(&random_softc[0],
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PZERO | PCATCH, "urand", 1);
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if (error != 0 && error != EWOULDBLOCK)
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continue;
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}
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if (buf == NULL)
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buf = (caddr_t)
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malloc(PAGE_SIZE, M_TEMP, M_WAITOK);
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c = min(iov->iov_len, PAGE_SIZE);
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poolsize = read_random_unlimited(buf, c);
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c = min(c, poolsize);
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error = uiomove(buf, (int)c, uio);
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continue;
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/* minor device 12 (/dev/zero) is source of nulls on read, rathole on write */
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case 12:
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if (uio->uio_rw == UIO_WRITE) {
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c = iov->iov_len;
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break;
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}
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if (zbuf == NULL) {
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zbuf = (caddr_t)
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malloc(PAGE_SIZE, M_TEMP, M_WAITOK);
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bzero(zbuf, PAGE_SIZE);
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}
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c = min(iov->iov_len, PAGE_SIZE);
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error = uiomove(zbuf, (int)c, uio);
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continue;
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default:
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return (ENXIO);
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}
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if (error)
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break;
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iov->iov_base += c;
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@ -291,56 +197,29 @@ mmrw(dev, uio, flags)
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uio->uio_offset += c;
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uio->uio_resid -= c;
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}
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if (buf)
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free(buf, M_TEMP);
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return (error);
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}
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/*******************************************************\
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* allow user processes to MMAP some memory sections *
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* instead of going through read/write *
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\*******************************************************/
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static int
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memmmap(dev_t dev, vm_offset_t offset, int nprot)
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memmmap(dev_t dev, vm_offset_t offset, int prot)
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{
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switch (minor(dev))
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{
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/* minor device 0 is physical memory */
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/* minor device 0 is physical memory */
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case 0:
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return i386_btop(offset);
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/* minor device 1 is kernel memory */
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/* minor device 1 is kernel memory */
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case 1:
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return i386_btop(vtophys(offset));
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default:
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return -1;
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}
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}
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static int
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mmioctl(dev, cmd, data, flags, p)
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dev_t dev;
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u_long cmd;
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caddr_t data;
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int flags;
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struct proc *p;
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{
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switch (minor(dev)) {
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case 0:
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return mem_ioctl(dev, cmd, data, flags, p);
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case 3:
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case 4:
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return random_ioctl(dev, cmd, data, flags, p);
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}
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return (ENODEV);
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}
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/*
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* Operations for changing memory attributes.
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*
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@ -348,12 +227,7 @@ mmioctl(dev, cmd, data, flags, p)
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* and mem_range_attr_set.
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*/
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static int
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mem_ioctl(dev, cmd, data, flags, p)
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dev_t dev;
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u_long cmd;
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caddr_t data;
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int flags;
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struct proc *p;
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mmioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct proc *p)
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{
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int nd, error = 0;
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struct mem_range_op *mo = (struct mem_range_op *)data;
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@ -409,9 +283,7 @@ mem_ioctl(dev, cmd, data, flags, p)
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* memory range attributes.
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*/
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int
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mem_range_attr_get(mrd, arg)
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struct mem_range_desc *mrd;
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int *arg;
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mem_range_attr_get(struct mem_range_desc *mrd, int *arg)
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{
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/* can we handle this? */
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if (mem_range_softc.mr_op == NULL)
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@ -419,16 +291,16 @@ mem_range_attr_get(mrd, arg)
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if (*arg == 0) {
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*arg = mem_range_softc.mr_ndesc;
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} else {
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bcopy(mem_range_softc.mr_desc, mrd, (*arg) * sizeof(struct mem_range_desc));
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}
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else {
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bcopy(mem_range_softc.mr_desc, mrd,
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(*arg) * sizeof(struct mem_range_desc));
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}
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return (0);
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}
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int
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mem_range_attr_set(mrd, arg)
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struct mem_range_desc *mrd;
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int *arg;
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mem_range_attr_set(struct mem_range_desc *mrd, int *arg)
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{
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/* can we handle this? */
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if (mem_range_softc.mr_op == NULL)
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@ -446,114 +318,37 @@ mem_range_AP_init(void)
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}
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#endif
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static int
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random_ioctl(dev, cmd, data, flags, p)
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dev_t dev;
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u_long cmd;
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caddr_t data;
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int flags;
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struct proc *p;
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static int
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mem_modevent(module_t mod, int type, void *data)
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{
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static intrmask_t interrupt_allowed;
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intrmask_t interrupt_mask;
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int error, intr;
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struct random_softc *sc;
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/*
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* We're the random or urandom device. The only ioctls are for
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* selecting and inspecting which interrupts are used in the muck
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* gathering business.
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*/
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if (cmd != MEM_SETIRQ && cmd != MEM_CLEARIRQ && cmd != MEM_RETURNIRQ)
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return (ENOTTY);
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switch(type) {
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case MOD_LOAD:
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if (bootverbose)
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printf("mem: <memory & I/O>\n");
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/* Initialise memory range handling */
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if (mem_range_softc.mr_op != NULL)
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mem_range_softc.mr_op->init(&mem_range_softc);
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/*
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* Even inspecting the state is privileged, since it gives a hint
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* about how easily the randomness might be guessed.
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*/
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error = suser(p);
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if (error != 0)
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return (error);
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memdev = make_dev(&mem_cdevsw, 0, UID_ROOT, GID_KMEM,
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0640, "mem");
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kmemdev = make_dev(&mem_cdevsw, 1, UID_ROOT, GID_KMEM,
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0640, "kmem");
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iodev = make_dev(&mem_cdevsw, 14, UID_ROOT, GID_WHEEL,
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0600, "io");
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return 0;
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/*
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* XXX the data is 16-bit due to a historical botch, so we use
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* magic 16's instead of ICU_LEN and can't support 24 interrupts
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* under SMP.
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*/
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intr = *(int16_t *)data;
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if (cmd != MEM_RETURNIRQ && (intr < 0 || intr >= 16))
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return (EINVAL);
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case MOD_UNLOAD:
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destroy_dev(memdev);
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destroy_dev(kmemdev);
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destroy_dev(iodev);
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return 0;
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interrupt_mask = 1 << intr;
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sc = &random_softc[intr];
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switch (cmd) {
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case MEM_SETIRQ:
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if (interrupt_allowed & interrupt_mask)
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break;
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interrupt_allowed |= interrupt_mask;
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sc->sc_intr = intr;
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disable_intr();
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sc->sc_handler = intr_handler[intr];
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intr_handler[intr] = add_interrupt_randomness;
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sc->sc_arg = intr_unit[intr];
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intr_unit[intr] = sc;
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enable_intr();
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break;
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case MEM_CLEARIRQ:
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if (!(interrupt_allowed & interrupt_mask))
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break;
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interrupt_allowed &= ~interrupt_mask;
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disable_intr();
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intr_handler[intr] = sc->sc_handler;
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intr_unit[intr] = sc->sc_arg;
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enable_intr();
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break;
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case MEM_RETURNIRQ:
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*(u_int16_t *)data = interrupt_allowed;
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break;
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}
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return (0);
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}
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case MOD_SHUTDOWN:
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return 0;
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int
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mmpoll(dev, events, p)
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dev_t dev;
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int events;
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struct proc *p;
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{
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switch (minor(dev)) {
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case 3: /* /dev/random */
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return random_poll(dev, events, p);
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case 4: /* /dev/urandom */
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default:
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return seltrue(dev, events, p);
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return EOPNOTSUPP;
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}
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}
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int
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iszerodev(dev)
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dev_t dev;
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{
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return ((major(dev) == mem_cdevsw.d_maj)
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&& minor(dev) == 12);
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}
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static void
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mem_drvinit(void *unused)
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{
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/* Initialise memory range handling */
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if (mem_range_softc.mr_op != NULL)
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mem_range_softc.mr_op->init(&mem_range_softc);
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make_dev(&mem_cdevsw, 0, UID_ROOT, GID_KMEM, 0640, "mem");
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make_dev(&mem_cdevsw, 1, UID_ROOT, GID_KMEM, 0640, "kmem");
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make_dev(&mem_cdevsw, 2, UID_ROOT, GID_WHEEL, 0666, "null");
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make_dev(&mem_cdevsw, 3, UID_ROOT, GID_WHEEL, 0644, "random");
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make_dev(&mem_cdevsw, 4, UID_ROOT, GID_WHEEL, 0644, "urandom");
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make_dev(&mem_cdevsw, 12, UID_ROOT, GID_WHEEL, 0666, "zero");
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make_dev(&mem_cdevsw, 14, UID_ROOT, GID_WHEEL, 0600, "io");
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}
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SYSINIT(memdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,mem_drvinit,NULL)
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DEV_MODULE(mem, mem_modevent, NULL);
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@ -112,7 +112,6 @@
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#include <i386/isa/intr_machdep.h>
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#include <isa/rtc.h>
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#include <machine/vm86.h>
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#include <sys/random.h>
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#include <sys/ptrace.h>
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#include <machine/sigframe.h>
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@ -1908,7 +1907,6 @@ init386(first)
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#if NISA >0
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isa_defaultirq();
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#endif
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rand_initialize();
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#ifdef DDB
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kdb_init();
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@ -53,27 +53,26 @@
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#include <sys/malloc.h>
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#include <sys/memrange.h>
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#include <sys/proc.h>
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#include <sys/random.h>
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#include <sys/signalvar.h>
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#include <sys/systm.h>
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#include <sys/uio.h>
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#include <machine/db_machdep.h>
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#include <machine/frame.h>
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#include <machine/psl.h>
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#include <machine/specialreg.h>
|
||||
#include <i386/isa/intr_machdep.h>
|
||||
|
||||
#include <vm/vm.h>
|
||||
#include <vm/pmap.h>
|
||||
#include <vm/vm_extern.h>
|
||||
|
||||
static dev_t memdev, kmemdev, iodev;
|
||||
|
||||
static d_open_t mmopen;
|
||||
static d_close_t mmclose;
|
||||
static d_read_t mmrw;
|
||||
static d_ioctl_t mmioctl;
|
||||
static d_mmap_t memmmap;
|
||||
static d_poll_t mmpoll;
|
||||
|
||||
#define CDEV_MAJOR 2
|
||||
static struct cdevsw mem_cdevsw = {
|
||||
@ -82,7 +81,7 @@ static struct cdevsw mem_cdevsw = {
|
||||
/* read */ mmrw,
|
||||
/* write */ mmrw,
|
||||
/* ioctl */ mmioctl,
|
||||
/* poll */ mmpoll,
|
||||
/* poll */ (d_poll_t *)seltrue,
|
||||
/* mmap */ memmmap,
|
||||
/* strategy */ nostrategy,
|
||||
/* name */ "mem",
|
||||
@ -93,39 +92,22 @@ static struct cdevsw mem_cdevsw = {
|
||||
/* bmaj */ -1
|
||||
};
|
||||
|
||||
static struct random_softc random_softc[16];
|
||||
static caddr_t zbuf;
|
||||
|
||||
MALLOC_DEFINE(M_MEMDESC, "memdesc", "memory range descriptors");
|
||||
static int mem_ioctl __P((dev_t, u_long, caddr_t, int, struct proc *));
|
||||
static int random_ioctl __P((dev_t, u_long, caddr_t, int, struct proc *));
|
||||
|
||||
struct mem_range_softc mem_range_softc;
|
||||
|
||||
|
||||
static int
|
||||
mmclose(dev, flags, fmt, p)
|
||||
dev_t dev;
|
||||
int flags;
|
||||
int fmt;
|
||||
struct proc *p;
|
||||
mmclose(dev_t dev, int flags, int fmt, struct proc *p)
|
||||
{
|
||||
switch (minor(dev)) {
|
||||
case 14:
|
||||
p->p_md.md_regs->tf_eflags &= ~PSL_IOPL;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
mmopen(dev, flags, fmt, p)
|
||||
dev_t dev;
|
||||
int flags;
|
||||
int fmt;
|
||||
struct proc *p;
|
||||
mmopen(dev_t dev, int flags, int fmt, struct proc *p)
|
||||
{
|
||||
int error;
|
||||
|
||||
@ -143,24 +125,19 @@ mmopen(dev, flags, fmt, p)
|
||||
return (EPERM);
|
||||
p->p_md.md_regs->tf_eflags |= PSL_IOPL;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*ARGSUSED*/
|
||||
static int
|
||||
mmrw(dev, uio, flags)
|
||||
dev_t dev;
|
||||
struct uio *uio;
|
||||
int flags;
|
||||
mmrw(dev_t dev, struct uio *uio, int flags)
|
||||
{
|
||||
register int o;
|
||||
register u_int c, v;
|
||||
u_int poolsize;
|
||||
register struct iovec *iov;
|
||||
int o;
|
||||
u_int c, v;
|
||||
struct iovec *iov;
|
||||
int error = 0;
|
||||
caddr_t buf = NULL;
|
||||
vm_offset_t addr, eaddr;
|
||||
|
||||
while (uio->uio_resid > 0 && error == 0) {
|
||||
iov = uio->uio_iov;
|
||||
@ -187,8 +164,7 @@ mmrw(dev, uio, flags)
|
||||
continue;
|
||||
|
||||
/* minor device 1 is kernel memory */
|
||||
case 1: {
|
||||
vm_offset_t addr, eaddr;
|
||||
case 1:
|
||||
c = iov->iov_len;
|
||||
|
||||
/*
|
||||
@ -214,76 +190,6 @@ mmrw(dev, uio, flags)
|
||||
continue;
|
||||
}
|
||||
|
||||
/* minor device 2 is EOF/RATHOLE */
|
||||
case 2:
|
||||
if (uio->uio_rw == UIO_READ)
|
||||
return (0);
|
||||
c = iov->iov_len;
|
||||
break;
|
||||
|
||||
/* minor device 3 (/dev/random) is source of filth on read, rathole on write */
|
||||
case 3:
|
||||
if (uio->uio_rw == UIO_WRITE) {
|
||||
c = iov->iov_len;
|
||||
break;
|
||||
}
|
||||
if (buf == NULL)
|
||||
buf = (caddr_t)
|
||||
malloc(PAGE_SIZE, M_TEMP, M_WAITOK);
|
||||
c = min(iov->iov_len, PAGE_SIZE);
|
||||
poolsize = read_random(buf, c);
|
||||
if (poolsize == 0) {
|
||||
if (buf)
|
||||
free(buf, M_TEMP);
|
||||
return (0);
|
||||
}
|
||||
c = min(c, poolsize);
|
||||
error = uiomove(buf, (int)c, uio);
|
||||
continue;
|
||||
|
||||
/* minor device 4 (/dev/urandom) is source of muck on read, rathole on write */
|
||||
case 4:
|
||||
if (uio->uio_rw == UIO_WRITE) {
|
||||
c = iov->iov_len;
|
||||
break;
|
||||
}
|
||||
if (CURSIG(curproc) != 0) {
|
||||
/*
|
||||
* Use tsleep() to get the error code right.
|
||||
* It should return immediately.
|
||||
*/
|
||||
error = tsleep(&random_softc[0],
|
||||
PZERO | PCATCH, "urand", 1);
|
||||
if (error != 0 && error != EWOULDBLOCK)
|
||||
continue;
|
||||
}
|
||||
if (buf == NULL)
|
||||
buf = (caddr_t)
|
||||
malloc(PAGE_SIZE, M_TEMP, M_WAITOK);
|
||||
c = min(iov->iov_len, PAGE_SIZE);
|
||||
poolsize = read_random_unlimited(buf, c);
|
||||
c = min(c, poolsize);
|
||||
error = uiomove(buf, (int)c, uio);
|
||||
continue;
|
||||
|
||||
/* minor device 12 (/dev/zero) is source of nulls on read, rathole on write */
|
||||
case 12:
|
||||
if (uio->uio_rw == UIO_WRITE) {
|
||||
c = iov->iov_len;
|
||||
break;
|
||||
}
|
||||
if (zbuf == NULL) {
|
||||
zbuf = (caddr_t)
|
||||
malloc(PAGE_SIZE, M_TEMP, M_WAITOK);
|
||||
bzero(zbuf, PAGE_SIZE);
|
||||
}
|
||||
c = min(iov->iov_len, PAGE_SIZE);
|
||||
error = uiomove(zbuf, (int)c, uio);
|
||||
continue;
|
||||
|
||||
default:
|
||||
return (ENXIO);
|
||||
}
|
||||
if (error)
|
||||
break;
|
||||
iov->iov_base += c;
|
||||
@ -291,56 +197,29 @@ mmrw(dev, uio, flags)
|
||||
uio->uio_offset += c;
|
||||
uio->uio_resid -= c;
|
||||
}
|
||||
if (buf)
|
||||
free(buf, M_TEMP);
|
||||
return (error);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*******************************************************\
|
||||
* allow user processes to MMAP some memory sections *
|
||||
* instead of going through read/write *
|
||||
\*******************************************************/
|
||||
static int
|
||||
memmmap(dev_t dev, vm_offset_t offset, int nprot)
|
||||
memmmap(dev_t dev, vm_offset_t offset, int prot)
|
||||
{
|
||||
switch (minor(dev))
|
||||
{
|
||||
|
||||
/* minor device 0 is physical memory */
|
||||
/* minor device 0 is physical memory */
|
||||
case 0:
|
||||
return i386_btop(offset);
|
||||
|
||||
/* minor device 1 is kernel memory */
|
||||
/* minor device 1 is kernel memory */
|
||||
case 1:
|
||||
return i386_btop(vtophys(offset));
|
||||
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
mmioctl(dev, cmd, data, flags, p)
|
||||
dev_t dev;
|
||||
u_long cmd;
|
||||
caddr_t data;
|
||||
int flags;
|
||||
struct proc *p;
|
||||
{
|
||||
|
||||
switch (minor(dev)) {
|
||||
case 0:
|
||||
return mem_ioctl(dev, cmd, data, flags, p);
|
||||
case 3:
|
||||
case 4:
|
||||
return random_ioctl(dev, cmd, data, flags, p);
|
||||
}
|
||||
return (ENODEV);
|
||||
}
|
||||
|
||||
/*
|
||||
* Operations for changing memory attributes.
|
||||
*
|
||||
@ -348,12 +227,7 @@ mmioctl(dev, cmd, data, flags, p)
|
||||
* and mem_range_attr_set.
|
||||
*/
|
||||
static int
|
||||
mem_ioctl(dev, cmd, data, flags, p)
|
||||
dev_t dev;
|
||||
u_long cmd;
|
||||
caddr_t data;
|
||||
int flags;
|
||||
struct proc *p;
|
||||
mmioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct proc *p)
|
||||
{
|
||||
int nd, error = 0;
|
||||
struct mem_range_op *mo = (struct mem_range_op *)data;
|
||||
@ -409,9 +283,7 @@ mem_ioctl(dev, cmd, data, flags, p)
|
||||
* memory range attributes.
|
||||
*/
|
||||
int
|
||||
mem_range_attr_get(mrd, arg)
|
||||
struct mem_range_desc *mrd;
|
||||
int *arg;
|
||||
mem_range_attr_get(struct mem_range_desc *mrd, int *arg)
|
||||
{
|
||||
/* can we handle this? */
|
||||
if (mem_range_softc.mr_op == NULL)
|
||||
@ -419,16 +291,16 @@ mem_range_attr_get(mrd, arg)
|
||||
|
||||
if (*arg == 0) {
|
||||
*arg = mem_range_softc.mr_ndesc;
|
||||
} else {
|
||||
bcopy(mem_range_softc.mr_desc, mrd, (*arg) * sizeof(struct mem_range_desc));
|
||||
}
|
||||
else {
|
||||
bcopy(mem_range_softc.mr_desc, mrd,
|
||||
(*arg) * sizeof(struct mem_range_desc));
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
int
|
||||
mem_range_attr_set(mrd, arg)
|
||||
struct mem_range_desc *mrd;
|
||||
int *arg;
|
||||
mem_range_attr_set(struct mem_range_desc *mrd, int *arg)
|
||||
{
|
||||
/* can we handle this? */
|
||||
if (mem_range_softc.mr_op == NULL)
|
||||
@ -446,114 +318,37 @@ mem_range_AP_init(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
random_ioctl(dev, cmd, data, flags, p)
|
||||
dev_t dev;
|
||||
u_long cmd;
|
||||
caddr_t data;
|
||||
int flags;
|
||||
struct proc *p;
|
||||
static int
|
||||
mem_modevent(module_t mod, int type, void *data)
|
||||
{
|
||||
static intrmask_t interrupt_allowed;
|
||||
intrmask_t interrupt_mask;
|
||||
int error, intr;
|
||||
struct random_softc *sc;
|
||||
|
||||
/*
|
||||
* We're the random or urandom device. The only ioctls are for
|
||||
* selecting and inspecting which interrupts are used in the muck
|
||||
* gathering business.
|
||||
*/
|
||||
if (cmd != MEM_SETIRQ && cmd != MEM_CLEARIRQ && cmd != MEM_RETURNIRQ)
|
||||
return (ENOTTY);
|
||||
switch(type) {
|
||||
case MOD_LOAD:
|
||||
if (bootverbose)
|
||||
printf("mem: <memory & I/O>\n");
|
||||
/* Initialise memory range handling */
|
||||
if (mem_range_softc.mr_op != NULL)
|
||||
mem_range_softc.mr_op->init(&mem_range_softc);
|
||||
|
||||
/*
|
||||
* Even inspecting the state is privileged, since it gives a hint
|
||||
* about how easily the randomness might be guessed.
|
||||
*/
|
||||
error = suser(p);
|
||||
if (error != 0)
|
||||
return (error);
|
||||
memdev = make_dev(&mem_cdevsw, 0, UID_ROOT, GID_KMEM,
|
||||
0640, "mem");
|
||||
kmemdev = make_dev(&mem_cdevsw, 1, UID_ROOT, GID_KMEM,
|
||||
0640, "kmem");
|
||||
iodev = make_dev(&mem_cdevsw, 14, UID_ROOT, GID_WHEEL,
|
||||
0600, "io");
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* XXX the data is 16-bit due to a historical botch, so we use
|
||||
* magic 16's instead of ICU_LEN and can't support 24 interrupts
|
||||
* under SMP.
|
||||
*/
|
||||
intr = *(int16_t *)data;
|
||||
if (cmd != MEM_RETURNIRQ && (intr < 0 || intr >= 16))
|
||||
return (EINVAL);
|
||||
case MOD_UNLOAD:
|
||||
destroy_dev(memdev);
|
||||
destroy_dev(kmemdev);
|
||||
destroy_dev(iodev);
|
||||
return 0;
|
||||
|
||||
interrupt_mask = 1 << intr;
|
||||
sc = &random_softc[intr];
|
||||
switch (cmd) {
|
||||
case MEM_SETIRQ:
|
||||
if (interrupt_allowed & interrupt_mask)
|
||||
break;
|
||||
interrupt_allowed |= interrupt_mask;
|
||||
sc->sc_intr = intr;
|
||||
disable_intr();
|
||||
sc->sc_handler = intr_handler[intr];
|
||||
intr_handler[intr] = add_interrupt_randomness;
|
||||
sc->sc_arg = intr_unit[intr];
|
||||
intr_unit[intr] = sc;
|
||||
enable_intr();
|
||||
break;
|
||||
case MEM_CLEARIRQ:
|
||||
if (!(interrupt_allowed & interrupt_mask))
|
||||
break;
|
||||
interrupt_allowed &= ~interrupt_mask;
|
||||
disable_intr();
|
||||
intr_handler[intr] = sc->sc_handler;
|
||||
intr_unit[intr] = sc->sc_arg;
|
||||
enable_intr();
|
||||
break;
|
||||
case MEM_RETURNIRQ:
|
||||
*(u_int16_t *)data = interrupt_allowed;
|
||||
break;
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
case MOD_SHUTDOWN:
|
||||
return 0;
|
||||
|
||||
int
|
||||
mmpoll(dev, events, p)
|
||||
dev_t dev;
|
||||
int events;
|
||||
struct proc *p;
|
||||
{
|
||||
switch (minor(dev)) {
|
||||
case 3: /* /dev/random */
|
||||
return random_poll(dev, events, p);
|
||||
case 4: /* /dev/urandom */
|
||||
default:
|
||||
return seltrue(dev, events, p);
|
||||
return EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
int
|
||||
iszerodev(dev)
|
||||
dev_t dev;
|
||||
{
|
||||
return ((major(dev) == mem_cdevsw.d_maj)
|
||||
&& minor(dev) == 12);
|
||||
}
|
||||
|
||||
static void
|
||||
mem_drvinit(void *unused)
|
||||
{
|
||||
|
||||
/* Initialise memory range handling */
|
||||
if (mem_range_softc.mr_op != NULL)
|
||||
mem_range_softc.mr_op->init(&mem_range_softc);
|
||||
|
||||
make_dev(&mem_cdevsw, 0, UID_ROOT, GID_KMEM, 0640, "mem");
|
||||
make_dev(&mem_cdevsw, 1, UID_ROOT, GID_KMEM, 0640, "kmem");
|
||||
make_dev(&mem_cdevsw, 2, UID_ROOT, GID_WHEEL, 0666, "null");
|
||||
make_dev(&mem_cdevsw, 3, UID_ROOT, GID_WHEEL, 0644, "random");
|
||||
make_dev(&mem_cdevsw, 4, UID_ROOT, GID_WHEEL, 0644, "urandom");
|
||||
make_dev(&mem_cdevsw, 12, UID_ROOT, GID_WHEEL, 0666, "zero");
|
||||
make_dev(&mem_cdevsw, 14, UID_ROOT, GID_WHEEL, 0600, "io");
|
||||
}
|
||||
|
||||
SYSINIT(memdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,mem_drvinit,NULL)
|
||||
|
||||
DEV_MODULE(mem, mem_modevent, NULL);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user