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The data cache on UltraSPARC III is not directly mapped, so don't assert

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that.  This breaks assumptions made by some of the cache flushing code,
but UltraSPARC III has different methods for invalidating cache lines
anyway.
This commit is contained in:
jake 2002-07-30 05:48:33 +00:00
parent 87912a806c
commit 5b1899e180
1 changed files with 0 additions and 2 deletions
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2
sys/sparc64/sparc64/cache.c
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@ -209,8 +209,6 @@ cache_init(phandle_t node)
panic("cache_init: D$ size not a power of 2");
if (((cache.dc_size / cache.dc_assoc) / PAGE_SIZE) != DCACHE_COLORS)
panic("cache_init: too many D$ colors");
if (cache.dc_assoc != 1)
panic("cache_init: D$ is not directly mapped!");
set = cache.ec_size / cache.ec_assoc;
cache.ec_l2set = ffs(set) - 1;
if ((set & ~(1UL << cache.ec_l2set)) != 0)