Fix low-level uart drivers that set their fifo sizes in the softc too late.
uart(4) allocates send and receiver buffers in attach() before it calls the low-level driver's attach routine. Many low-level drivers set the fifo sizes in their attach routine, which is too late. Other drivers set them in the probe() routine, so that they're available when uart(4) allocates buffers. This fixes the ones that were setting the values too late by moving the code to probe().
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720da1df6b
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@ -233,14 +233,6 @@ static kobj_method_t s3c2410_methods[] = {
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int
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s3c2410_bus_probe(struct uart_softc *sc)
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{
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return (0);
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}
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static int
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s3c2410_bus_attach(struct uart_softc *sc)
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{
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uintptr_t irq;
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switch(s3c2xx0_softc->sc_cpu) {
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case CPU_S3C2410:
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sc->sc_txfifosz = 16;
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@ -253,7 +245,15 @@ s3c2410_bus_attach(struct uart_softc *sc)
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default:
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return (ENXIO);
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}
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return (0);
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}
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static int
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s3c2410_bus_attach(struct uart_softc *sc)
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{
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uintptr_t irq;
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sc->sc_hwiflow = 0;
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sc->sc_hwoflow = 0;
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@ -156,6 +156,8 @@ static kobj_method_t sa1110_methods[] = {
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int
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sa1110_bus_probe(struct uart_softc *sc)
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{
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sc->sc_txfifosz = 3;
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sc->sc_rxfifosz = 1;
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return (0);
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}
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@ -164,8 +166,6 @@ sa1110_bus_attach(struct uart_softc *sc)
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{
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bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
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sc->sc_txfifosz = 3;
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sc->sc_rxfifosz = 1;
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sc->sc_hwiflow = 0;
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uart_setreg(&sc->sc_bas, SACOM_CR3, CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE);
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return (0);
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@ -187,9 +187,6 @@ imx_uart_bus_attach(struct uart_softc *sc)
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imx_uart_init(bas, 115200, 8, 1, 0);
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}
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sc->sc_rxfifosz = 1;
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sc->sc_txfifosz = 1;
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(void)imx_uart_bus_getsig(sc);
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/* XXX workaround to have working console on manut prompt */
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@ -353,6 +350,9 @@ imx_uart_bus_probe(struct uart_softc *sc)
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if (error)
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return (error);
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sc->sc_rxfifosz = 1;
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sc->sc_txfifosz = 1;
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device_set_desc(sc->sc_dev, "imx_uart");
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return (0);
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}
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@ -278,9 +278,6 @@ uart_pl011_bus_attach(struct uart_softc *sc)
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/* Clear RX & TX interrupts */
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__uart_setreg(bas, UART_ICR, IMSC_MASK_ALL);
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sc->sc_rxfifosz = 1;
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sc->sc_txfifosz = 1;
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return (0);
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}
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@ -377,6 +374,9 @@ uart_pl011_bus_probe(struct uart_softc *sc)
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device_set_desc(sc->sc_dev, "PrimeCell UART (PL011)");
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sc->sc_rxfifosz = 1;
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sc->sc_txfifosz = 1;
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return (0);
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}
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@ -293,9 +293,6 @@ quicc_bus_attach(struct uart_softc *sc)
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quicc_setup(bas, 9600, 8, 1, UART_PARITY_NONE);
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}
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sc->sc_rxfifosz = 1;
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sc->sc_txfifosz = 1;
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/* Enable interrupts on the receive buffer. */
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rb = quicc_read2(bas, QUICC_PRAM_SCC_RBASE(bas->chan - 1));
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st = quicc_read2(bas, rb);
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@ -417,6 +414,9 @@ quicc_bus_probe(struct uart_softc *sc)
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if (error)
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return (error);
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sc->sc_rxfifosz = 1;
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sc->sc_txfifosz = 1;
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snprintf(buf, sizeof(buf), "quicc, channel %d", sc->sc_bas.chan);
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device_set_desc_copy(sc->sc_dev, buf);
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return (0);
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@ -407,9 +407,6 @@ sab82532_bus_attach(struct uart_softc *sc)
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if (sc->sc_sysdev == NULL)
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sab82532_init(bas, 9600, 8, 1, UART_PARITY_NONE);
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sc->sc_rxfifosz = 32;
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sc->sc_txfifosz = 32;
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imr0 = SAB_IMR0_TCD|SAB_IMR0_TIME|SAB_IMR0_CDSC|SAB_IMR0_RFO|
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SAB_IMR0_RPF;
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uart_setreg(bas, SAB_IMR0, 0xff & ~imr0);
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@ -592,6 +589,9 @@ sab82532_bus_probe(struct uart_softc *sc)
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if (error)
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return (error);
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sc->sc_rxfifosz = 32;
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sc->sc_txfifosz = 32;
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ch = sc->sc_bas.chan - 1 + 'A';
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switch (uart_getreg(&sc->sc_bas, SAB_VSTR) & SAB_VSTR_VMASK) {
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@ -332,9 +332,6 @@ z8530_bus_attach(struct uart_softc *sc)
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}
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z8530->txidle = 1; /* Report SER_INT_TXIDLE. */
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sc->sc_rxfifosz = 3;
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sc->sc_txfifosz = 1;
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(void)z8530_bus_getsig(sc);
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uart_setmreg(bas, WR_IC, IC_BRK | IC_CTS | IC_DCD);
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@ -515,6 +512,9 @@ z8530_bus_probe(struct uart_softc *sc)
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if (error)
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return (error);
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sc->sc_rxfifosz = 3;
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sc->sc_txfifosz = 1;
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ch = sc->sc_bas.chan - 1 + 'A';
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snprintf(buf, sizeof(buf), "z8530, channel %c", ch);
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@ -221,9 +221,6 @@ adm5120_uart_bus_attach(struct uart_softc *sc)
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/* TODO: set parameters 115200, 8N1 */
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}
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sc->sc_rxfifosz = 16;
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sc->sc_txfifosz = 16;
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(void)adm5120_uart_bus_getsig(sc);
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#if 1
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@ -367,6 +364,9 @@ adm5120_uart_bus_probe(struct uart_softc *sc)
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if (error)
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return (error);
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sc->sc_rxfifosz = 16;
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sc->sc_txfifosz = 16;
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ch = sc->sc_bas.chan + 'A';
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snprintf(buf, sizeof(buf), "adm5120_uart, channel %c", ch);
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@ -272,9 +272,6 @@ rt305x_uart_bus_attach(struct uart_softc *sc)
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rt305x_uart_init(bas, 115200, 8, 1, 0);
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}
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sc->sc_rxfifosz = 16;
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sc->sc_txfifosz = 16;
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(void)rt305x_uart_bus_getsig(sc);
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/* Enable FIFO */
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@ -438,6 +435,9 @@ rt305x_uart_bus_probe(struct uart_softc *sc)
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if (error)
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return (error);
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sc->sc_rxfifosz = 16;
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sc->sc_txfifosz = 16;
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snprintf(buf, sizeof(buf), "rt305x_uart");
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device_set_desc_copy(sc->sc_dev, buf);
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@ -835,13 +835,6 @@ sbbc_uart_bus_attach(struct uart_softc *sc)
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bst = bas->bst;
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bsh = bas->bsh;
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sc->sc_rxfifosz = SBBC_SRAM_READ_4(sbbc_solcons +
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SBBC_CONS_OFF(cons_in_end)) - SBBC_SRAM_READ_4(sbbc_solcons +
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SBBC_CONS_OFF(cons_in_begin)) - 1;
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sc->sc_txfifosz = SBBC_SRAM_READ_4(sbbc_solcons +
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SBBC_CONS_OFF(cons_out_end)) - SBBC_SRAM_READ_4(sbbc_solcons +
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SBBC_CONS_OFF(cons_out_begin)) - 1;
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uart_lock(sc->sc_hwmtx);
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/*
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@ -995,11 +988,24 @@ sbbc_uart_bus_param(struct uart_softc *sc __unused, int baudrate __unused,
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}
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static int
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sbbc_uart_bus_probe(struct uart_softc *sc __unused)
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sbbc_uart_bus_probe(struct uart_softc *sc)
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{
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struct uart_bas *bas;
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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if (sbbc_console != 0)
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if (sbbc_console != 0) {
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bas = &sc->sc_bas;
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bst = bas->bst;
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bsh = bas->bsh;
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sc->sc_rxfifosz = SBBC_SRAM_READ_4(sbbc_solcons +
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SBBC_CONS_OFF(cons_in_end)) - SBBC_SRAM_READ_4(sbbc_solcons +
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SBBC_CONS_OFF(cons_in_begin)) - 1;
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sc->sc_txfifosz = SBBC_SRAM_READ_4(sbbc_solcons +
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SBBC_CONS_OFF(cons_out_end)) - SBBC_SRAM_READ_4(sbbc_solcons +
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SBBC_CONS_OFF(cons_out_begin)) - 1;
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return (0);
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}
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return (ENXIO);
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}
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