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Bandaid: disable interrupts to make sure intr_enabled and the IER register

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are in sync. I'm not sure why it is needed, and why it wouldn't be on other
arm platforms, but it prevents a lockup under heavy I/O.
This commit is contained in:
cognet 2008-09-11 20:43:38 +00:00
parent a815eb98d3
commit 5b5d402e31
1 changed files with 8 additions and 3 deletions
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11
sys/arm/xscale/ixp425/ixp425.c
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@ -143,22 +143,27 @@ ixp425_irq2gpio_bit(int irq)
void
arm_mask_irq(uintptr_t nb)
{
int i;
i = disable_interrupts(I32_bit);
intr_enabled &= ~(1 << nb);
ixp425_set_intrmask();
restore_interrupts(i);
/*XXX; If it's a GPIO interrupt, ACK it know. Can it be a problem ?*/
if ((1 << nb) & IXP425_INT_GPIOMASK)
IXPREG(IXP425_GPIO_VBASE + IXP425_GPIO_GPISR) =
ixp425_irq2gpio_bit(nb);
}
void
arm_unmask_irq(uintptr_t nb)
{
int i;
i = disable_interrupts(I32_bit);
intr_enabled |= (1 << nb);
ixp425_set_intrmask();
restore_interrupts(i);
}
static __inline uint32_t