Make sure gcc doesn't generate something such as swp r3, r4, [r3] for __swp,

as it has unpredictable results.

sys/arm/include/atomic.h

@@ -75,7 +75,7 @@ static __inline uint32_t
 __swp(uint32_t val, volatile uint32_t *ptr)
 {
 	__asm __volatile("swp	%0, %1, [%2]"
-	    : "=r" (val) : "r" (val) , "r" (ptr) : "memory");
+	    : "=&r" (val) : "r" (val) , "r" (ptr) : "memory");
 	return (val);
 }