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Set IO Sync Barrier flags for all Mbus devices on Armada38x

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IO Sync Barrier setting is required for I/O coherency.

Reviewed by:   andrew, ian, imp
Obtained from: Semihalf
Sponsored by:  Stormshield
Submitted by:  Michal Stanek <mst@semihalf.com>
Differential revision:  https://reviews.freebsd.org/D4219
This commit is contained in:
Zbigniew Bodek 2016-01-20 13:53:33 +00:00
parent 8abfc69d11
commit 5b683b6fc5
3 changed files with 45 additions and 0 deletions
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26
sys/arm/mv/armada38x/armada38x.c
View File

@ -32,10 +32,14 @@ __FBSDID("$FreeBSD$");
#include <sys/systm.h>
#include <sys/bus.h>
#include <machine/fdt.h>
#include <arm/mv/mvwin.h>
#include <arm/mv/mvreg.h>
#include <arm/mv/mvvar.h>
int armada38x_win_set_iosync_barrier(void);
uint32_t
get_tclk(void)
{
@ -52,3 +56,25 @@ get_tclk(void)
else
return (TCLK_200MHZ);
}
int
armada38x_win_set_iosync_barrier(void)
{
bus_space_handle_t vaddr_iowind;
int rv;
rv = bus_space_map(fdtbus_bs_tag, (bus_addr_t)MV_MBUS_BRIDGE_BASE,
MV_CPU_SUBSYS_REGS_LEN, 0, &vaddr_iowind);
if (rv != 0)
return (rv);
/* Set Sync Barrier flags for all Mbus internal units */
bus_space_write_4(fdtbus_bs_tag, vaddr_iowind, MV_SYNC_BARRIER_CTRL,
MV_SYNC_BARRIER_CTRL_ALL);
bus_space_barrier(fdtbus_bs_tag, vaddr_iowind, 0,
MV_CPU_SUBSYS_REGS_LEN, BUS_SPACE_BARRIER_WRITE);
bus_space_unmap(fdtbus_bs_tag, vaddr_iowind, MV_CPU_SUBSYS_REGS_LEN);
return (rv);
}

9
sys/arm/mv/mv_machdep.c
View File

@ -66,6 +66,9 @@ static int platform_mpp_init(void);
void armadaxp_init_coher_fabric(void);
void armadaxp_l2_init(void);
#endif
#if defined(SOC_MV_ARMADA38X)
int armada38x_win_set_iosync_barrier(void);
#endif
#define MPP_PIN_MAX 68
#define MPP_PIN_CELLS 2
@ -249,6 +252,12 @@ platform_late_init(void)
#endif
armadaxp_l2_init();
#endif
#if defined(SOC_MV_ARMADA38X)
/* Set IO Sync Barrier bit for all Mbus devices */
if (armada38x_win_set_iosync_barrier() != 0)
printf("WARNING: could not map CPU Subsystem registers\n");
#endif
}
#define FDT_DEVMAP_MAX (MV_WIN_CPU_MAX + 2)

10
sys/arm/mv/mvwin.h
View File

@ -305,6 +305,16 @@
#define MV_WIN_SATA_BASE(n) (0x10 * (n) + 0x34)
#define MV_WIN_SATA_MAX 4
#if defined(SOC_MV_ARMADA38X)
#define MV_BOOTROM_MEM_ADDR 0xFFF00000
#define MV_BOOTROM_WIN_SIZE 0xF
#define MV_CPU_SUBSYS_REGS_LEN 0x100
/* Internal Units Sync Barrier Control Register */
#define MV_SYNC_BARRIER_CTRL 0x84
#define MV_SYNC_BARRIER_CTRL_ALL 0xFFFF
#endif
#define WIN_REG_IDX_RD(pre,reg,off,base) \
static __inline uint32_t \
pre ## _ ## reg ## _read(int i) \